Use clk_prepare/clk_unprepare as required by the generic clk framework.
This patch should go through Tegra tree since other patches to port tegra
to generic clock framework are dependent on it. Posting here to get ack from
the maintainers.
Signed-off-by: Prashant Gaikwad pgaik...@nvidia.com
---
On 1 June 2012 09:35, Adrian Hunter adrian.hun...@intel.com wrote:
On 29/05/12 05:32, Ben Hutchings wrote:
On Mon, 2012-05-28 at 18:31 +0100, Torne (Richard Coles) wrote:
From: Torne (Richard Coles) to...@google.com
MMC CSD info can specify very large, ridiculous timeouts, big enough to
On 1 June 2012 10:31, Torne (Richard Coles) to...@google.com wrote:
On 1 June 2012 09:35, Adrian Hunter adrian.hun...@intel.com wrote:
On 29/05/12 05:32, Ben Hutchings wrote:
On Mon, 2012-05-28 at 18:31 +0100, Torne (Richard Coles) wrote:
From: Torne (Richard Coles) to...@google.com
MMC CSD
On 01/06/12 12:32, Torne (Richard Coles) wrote:
On 1 June 2012 10:31, Torne (Richard Coles) to...@google.com wrote:
On 1 June 2012 09:35, Adrian Hunter adrian.hun...@intel.com wrote:
On 29/05/12 05:32, Ben Hutchings wrote:
On Mon, 2012-05-28 at 18:31 +0100, Torne (Richard Coles) wrote:
From:
On 1 June 2012 11:09, Adrian Hunter adrian.hun...@intel.com wrote:
On 01/06/12 12:32, Torne (Richard Coles) wrote:
On 1 June 2012 10:31, Torne (Richard Coles) to...@google.com wrote:
On 1 June 2012 09:35, Adrian Hunter adrian.hun...@intel.com wrote:
On 29/05/12 05:32, Ben Hutchings wrote:
On
On 01/06/12 13:20, Torne (Richard Coles) wrote:
On 1 June 2012 11:09, Adrian Hunter adrian.hun...@intel.com wrote:
On 01/06/12 12:32, Torne (Richard Coles) wrote:
On 1 June 2012 10:31, Torne (Richard Coles) to...@google.com wrote:
On 1 June 2012 09:35, Adrian Hunter adrian.hun...@intel.com
On 1 June 2012 13:59, Adrian Hunter adrian.hun...@intel.com wrote:
On 01/06/12 13:20, Torne (Richard Coles) wrote:
On 1 June 2012 11:09, Adrian Hunter adrian.hun...@intel.com wrote:
On 01/06/12 12:32, Torne (Richard Coles) wrote:
On 1 June 2012 10:31, Torne (Richard Coles) to...@google.com
From: Torne (Richard Coles) to...@google.com
MMC CSD info can specify very large, ridiculous timeouts, big enough to
overflow timeout_ns. This can result in the card timing out on every
operation because the wrapped timeout value is far too small.
Fix the overflow by capping the result at
I recently added a patch that prevents the switch to 1.8v if the host
capabilities register does not indicate support for any of the UHS
speeds (SDR50, DDR50, SDR104). This allowed our controller to work
with UHS cards in HS mode (50MHz, 3.3v).
Al
On Sun, May 27, 2012 at 9:36 PM,
Hi,
On Fri, Jun 01 2012, Adrian Hunter wrote:
I just noticed that from linux 3.4, the SD write timeout is now 3 seconds
triggering the sdhci driver warning on every write on every SD card.
So change pr_warning to DGB in sdhci_calc_timeout(). Chris?
Oops, thanks for noticing:
Subject: mmc:
Alan,
I have your patch in my mmc-next. Our controller indicates it SUPPORTS UHS
modes.
The regulators do NOT. Cannot switch to 1.8v.
Not the same problem as you saw.
Philip
On Jun 1, 2012, at 6:55 AM, Alan Cooper wrote:
I recently added a patch that prevents the switch to 1.8v if the
Our experiments showed that the write packing causes degradation of the read
throughput, in parallel read and write operations.
Since the read latency is critical for user experience we added a write packing
control
mechanism that disables the write packing in case of read requests.
This will
Philip,
I don't think you should add yet another quirk for this. You should
plumb in a method to mask the capability registers to enable or
disable features you don't want. This would probably fix problems for
a lot of controller and board configurations.
-- Mark
On Fri, Jun 1, 2012 at 11:26
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