[PATCH 1/1] mmc: sdhci: Clear all possible pending status bits

Clear all possible pending status bits before request_irq I meet below oops error occasionally at my Freescale mx6q SabreSD board, it seems SDHCI_INT_CARD_INT is triggered but the sdio task is still not created. ---DUMP- sdhc

Re: [PATCH v6 2/4] ARM: pxa168: Add SDHCI support

On 3/17/13 8:13 PM, Haojian Zhuang wrote: On Mon, Mar 18, 2013 at 2:18 AM, Tanmay Upadhyay wrote: v2 - clock register for SDHCI are not common across all MMP SoCs. So, move PXA168 implementation to pxa168.c v3 - sdhci-pxav1 driver code is merged with sdhci-pxav2. So, change the de

Re: [PATCH v6 2/4] ARM: pxa168: Add SDHCI support

On Mon, Mar 18, 2013 at 2:18 AM, Tanmay Upadhyay wrote: > v2 - clock register for SDHCI are not common across all MMP SoCs. > So, move PXA168 implementation to pxa168.c > > v3 - sdhci-pxav1 driver code is merged with sdhci-pxav2. So, change > the device name accordingly >- start sdhc

Re: [PATCH v2 4/4] ARM: pxa168/gplugd: Add support for SD port 1

On Mon, Mar 18, 2013 at 2:20 AM, Tanmay Upadhyay wrote: > v2 - after sdhci-pxav1 driver is merged with sdhci-pxav2, pass > pxav1_controller = 1 >- as sdhci device numbering now starts from 1, call > pxa168_add_sdh accordingly > > Signed-off-by: Tanmay Upadhyay > Reviewed-by: Philip

[PATCH v2 4/4] ARM: pxa168/gplugd: Add support for SD port 1

v2 - after sdhci-pxav1 driver is merged with sdhci-pxav2, pass pxav1_controller = 1 - as sdhci device numbering now starts from 1, call pxa168_add_sdh accordingly Signed-off-by: Tanmay Upadhyay Reviewed-by: Philip Rakity --- arch/arm/mach-mmp/gplugd.c |6 ++ 1 file changed,

[PATCH v2 3/4] mmc: sdhci-pxa: Add SDHCI driver for PXA16x

PXA16x devices uses SDHCI controller v1. As it's not much different than v2 controller, v1 driver is merged with sdhci-pxav2 driver v2 - instead of having separate file sdhci-pxav1, merge code with sdhci-pxav2 driver code as suggested by Chris Ball Signed-off-by: Philip Rakity Signed-off-by

[PATCH 0/4] Add SD support for PXA168 & gplugD

This patch series adds support for on-chip SD controller on PXA168 Tanmay Upadhyay (4): mmc: sdhci-pxa: Trivial fix in Kconfig ARM: pxa168: Add SDHCI support mmc: sdhci-pxa: Add SDHCI driver for PXA16x ARM: pxa168/gplugd: Add support for SD port 1 arch/arm/mach-mmp/Kconfig

[PATCH 1/4] mmc: sdhci-pxa: Trivial fix in Kconfig

Select MMC_SDHCI_PXAV3 by default if CPU is MMP2 Select MMC_SDHCI_PXAV2 by default if CPU is PXA910 Signed-off-by: Tanmay Upadhyay Reviewed-by: Philip Rakity --- drivers/mmc/host/Kconfig |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/Kconfig b/driver

[PATCH v6 2/4] ARM: pxa168: Add SDHCI support

v2 - clock register for SDHCI are not common across all MMP SoCs. So, move PXA168 implementation to pxa168.c v3 - sdhci-pxav1 driver code is merged with sdhci-pxav2. So, change the device name accordingly - start sdhci device numbering from 1 as other PXA168 devices does that v4

Re: [PATCH] ARM: mach-moxart: platform port for MOXA ART SoC

Thank you for the feedback. Some of the changes are sure to be a challenge for me, but I want to move this forward, and having a list helps. 3.2.40 is as far as it'll go right now, nothing prints to UART starting with 3.3.8 (last tested, it's somewhere around there). I have been advised to enabl

When bus width detection procedure takes place, kernel cannot lock on correct bus width

Hi Elad, I'm forwarding your bug report to the linux-mmc@ list. - Chris. I've been working on a bringup of an new board in Harmonic Inc. This board uses Sandisk iNand eMMC flash. I've noticed that the mmc driver keeps detecting 1 bit width although HW supports 4 bit, looked into it, and found th