Acked-by: Jaehoon Chung jh80.ch...@samsung.com
On 03/25/2013 04:28 PM, Seungwon Jeon wrote:
mci_writew causes a failure of fifo access for 64-bit.
mci_writeq is correct.
Signed-off-by: Seungwon Jeon tgih@samsung.com
---
drivers/mmc/host/dw_mmc.c |3 ++-
1 files changed, 2
When card is power-on/off, need to control the power-enable register.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mmc/host/dw_mmc.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mmc/host/dw_mmc.c
Elad,
I would like to discuss this problem with someone at sandisk. Could you let me
know what part you are using.
Also, since you have managed to track down the problem this far perhaps you can
print out the fields values in 1, 4, and 8 bit modes and let me know what is
present.
regards,
Jaehoon,
On Mon, Mar 18, 2013 at 3:21 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Doug,
Great..i have found the problem like this.
I will check your patch..and share the result.
Did you have any time to check this patch?
Thanks!
-Doug
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Last year Seungwon Jeon (Samsung) fixed a bug in CLKDIV computation.
But when debugging a related issue (http://crbug.com/221828) I found
the code unreadable. This rewrite simplifies the computation and
explains each step.
Signed-off-by: Grant Grundler grund...@chromium.org
---
Tested on Samsung
I've attached the test program I wrote to compare the different
flavors of CLKDIV computation: old (3.4 kernel), current upstream, and
my rewrite.
thanks
grant
On Tue, Mar 26, 2013 at 3:50 PM, Grant Grundler grund...@chromium.org wrote:
Last year Seungwon Jeon (Samsung) fixed a bug in CLKDIV
On the t4240 platform, sdhci controller can only support 1.8V
voltage, but the peripheral hardware circuit has capability to
support 3.3V voltage.
Signed-off-by: Chunhe Lan chunhe@freescale.com
Cc: Chris Ball c...@laptop.org
---
drivers/mmc/host/sdhci-pltfm.c |3 +++
