Hi Grant,
Still waiting on the remaining warning/error, and also noticed a
trivial typo:
On Thu, Jan 23 2014, Grant Grundler wrote:
+ /* 2) Host send CMD6 to set MODE_CONFIG[30] = 0x01 */
+ memset(idata, 0, sizeof(idata));
+ idata.opcode = MMC_SWITCH;
+idata.arg =
Hi Ulf
On Thu, Dec 19, 2013 at 12:04 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
There are no reason to why the use of a non-volatile internal eMMC
cache should be controlled by a host cap. Instead let's just enable it
if the eMMC card supports it.
Signed-off-by: Ulf Hansson
On Thu, Jan 30, 2014 at 09:36:06PM -0800, Kuninori Morimoto wrote:
Hi Simon
These are v2 of updates code for R-Car.
I separated v1 patches into for mmc, and for SH-ARM.
This is SH-ARM part patches.
These need my previous mmc part patches.
Thanks Morimoto-san,
could you please repost
On Thu, Jan 30, 2014 at 09:39:40PM -0800, Kuninori Morimoto wrote:
From: Kuninori Morimoto kuninori.morimoto...@renesas.com
Latest Renesas Chip has some SDHI channels and the WP pin
availability depends on its channel or HW implementation.
Thus, this patch decides new policy whch indicates
It is fully legal for a controller to start handling busy-end interrupt
before it has signaled that the command has completed. So make sure
we do things in the proper order, Or it results that command interrupt
is ignored so it can cause unexpected operations. This is founded at some
toshiba emmc
On Thu, Jan 30, 2014 at 09:30:20PM -0800, Kuninori Morimoto wrote:
Hi Chris, Simon
These are v2 of updates code for R-Car.
I separated v1 patches into for mmc, and for SH-ARM.
This is mmc part patches.
Kuninori Morimoto (4):
mmc: SDHI: tidyup sh_mobile_sdhi_of_match position