Hi,
On Thu, 17 Apr 2014 06:33:59 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Sebastian,
On Wed, Apr 16, 2014 at 04:26:06PM +0200, Sebastian Hesselbarth wrote:
On 04/16/2014 02:40 PM, Antoine Ténart wrote:
Add a Driver to support the SDHCI controller of the Marvell
Hi all,
On Wed, Apr 16, 2014 at 02:40:08PM +0200, Antoine Ténart wrote:
Add a Driver to support the SDHCI controller of the Marvell Berlin SoCs.
This controller supports 3 sockets.
After talking a bit with Sebastian and Jisheng I decided to have a look on the
pxav3 driver. I gave it a try, it
Add O2Micro/BayHubTech chip 8520 subversion B1 SD3.0 support.
Add O2Micro/BayHubTech chip 8620 and 8621 SD3.0 support
Enable Led function of 8520 chip.
Signed-off-by: peter.guo peter@bayhubtech.com
---
drivers/mmc/host/sdhci-pci-o2micro.c | 59 +-
1 file
Hi Peter,
On Fri, Apr 18 2014, Peter Guo wrote:
@@ -215,6 +251,25 @@ int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
scratch = 0x7f;
pci_write_config_byte(chip-pdev, O2_SD_LOCK_WP, scratch);
+ if (chip-pdev-device == PCI_DEVICE_ID_O2_FUJIN2) {
+
This series contains the change for selection of bus speed mode.
Previous implementation is complicated and some sequence is duplicated.
And specially, HS400 mode eMMC5.0 is introduced this time.
This patch-set has been tested in Exynos SoC.
Note:
This patch-set depends on [PATCH RESEND v3 1/7]
Device types which are supported by both host and device
can be identified when EXT_CSD is read. There is no need to
check host's capability anymore.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Tested-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Power class is changed once only after selection of bus modes
including speed and bus-width finishes finally.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Tested-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Ulf Hansson
Current implementation for bus speed mode selection is too
complicated. This patch is to simplify the codes and remove
some duplicate parts.
The following changes are including:
* Adds functions for each mode selection(HS, HS-DDR, HS200 and etc)
* Rearranged the mode selection sequence with
Timing mode identifier has same role and can take the place
of speed mode. This change removes all related speed mode.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Ulf Hansson ulf.hans...@linaro.org
Tested-by: Jaehoon Chung jh80.ch...@samsung.com
Acked-by: Jaehoon Chung
This patch adds HS400 mode support for eMMC5.0 device.
HS400 mode is high speed DDR interface timing from HS200.
Clock frequency is up to 200MHz and only 8-bit bus width is
supported. In addition, tuning process of HS200 is required
to synchronize the command response on the CMD line because
CMD
Provide the option to configure these speed modes per host,
for those host driver's that can't distinguish this in runtime.
Specially, if host can support HS400, it means that host can also
support HS200.
Signed-off-by: Seungwon Jeon tgih@samsung.com
---
Hi,
shouldn't we add something like that do auto-detect MMC_CAP_1_8V_DDR on
sdhci controller ?
MatthieuFrom f821501dada7041521fe80a5fe92bdc8b15f055b Mon Sep 17 00:00:00 2001
From: Matthieu CASTET matthieu.cas...@parrot.com
Date: Fri, 18 Apr 2014 15:49:05 +0200
Subject: [PATCH] sdhci : UHS DDR50
Hi!
On Wednesday 16 April 2014 09:38:44 micky_ch...@realsil.com.cn wrote:
From: Micky Ching micky_ch...@realsil.com.cn
To avoid dead lock, we need make sure host-lock is always acquire
before pcr-lock. But in irq handler, we acquired pcr-lock in rtsx mfd
driver, and sd_isr_done_transfer()
Hi,
Sorry for the delay, just noticed this one.
* Dmitry Lifshitz lifsh...@compulab.co.il [140324 02:34]:
Hi,
I've tested the branch omap_hsmmc_sdio_irq_devm_cleanup on custom OMAP5
based board.
We have mwifiex connected to MMC3.
I used two approaches:
* Using dat1 line as GPIO with
* Paolo Pisati p.pis...@gmail.com [140331 15:00]:
On Thu, Mar 27, 2014 at 06:54:14PM +0100, Paolo Pisati wrote:
I've been experiencing hangs on reboot on two different panda boards (es
rev1
and vanilla rev a1) with v3.14-rc8 (but reproducible in 3.13 too):
toolchanin: gcc version
On Tue, Apr 15, 2014 at 11:14:13PM +0800, Axel Lin wrote:
commit 60e8c1e34d3a
regulator: pbias: Convert to use regmap helper functions
might also required for 3.15.
The reason is this commit implements .list_voltage and the mmc core calls
regulator_list_voltage() in
The eMMC signalling voltage is determined by VCCQ which is provided to
the card by the host. Signalling is not required to begin at 3.3v and,
if the host and card both support a particular VCC/VCCQ combination, it
can be used immediately.
In contrast, SD Cards must begin with 3.3v signalling and
On Wed, Apr 16, 2014 at 12:20 AM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 15 April 2014 19:09, Tim Kryger tim.kry...@linaro.org wrote:
On Fri, Apr 11, 2014 at 1:15 AM, Ulf Hansson ulf.hans...@linaro.org wrote:
A few times I have suggested to switch to use the
mmc_regulator_get_supply()
So, I reverted c42deffd5b53c9e583d83c7964854ede2f12410d (mmc: rtsx: add
support for pre_req and post_req) on top of v3.15-rc1-49-g10ec34f and the
hang issue went away.
There is something that is possibly problematic. All three tasklets (cmd,
data, finish) try to spinlock on host-lock.
When of_property_read_u32 does not find a property, it does not
initialise the variable, yet we were using the uninitialised variable.
Found and reproduced in sdhci-pxav3.c, on wider review found also in two
other places in drivers/mmc/host/, did not review wider.
Signed-off-by: James Cameron
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