As commit 3957848(mmc: drop the speed mode of card's state) applies,
this change should be followed.
drivers/net/wireless/rsi/rsi_91x_sdio.c:288:20: error: 'MMC_STATE_HIGHSPEED'
undeclared (first use in this function)
drivers/net/wireless/rsi/rsi_91x_sdio.c:299:4: error: implicit declaration of
Thanks Felipe,
On 21/04/14 23:08, Felipe Balbi wrote:
+ if (var-reg_write_delay host-mclk)
+ udelay(1 + ((var-reg_write_delay * USEC_PER_SEC)/host-mclk));
looks like this should be quirk flag instead of a write delay... No
strong feelings though, but it looks like the
On 22 April 2014 08:57, Seungwon Jeon tgih@samsung.com wrote:
As commit 3957848(mmc: drop the speed mode of card's state) applies,
this change should be followed.
drivers/net/wireless/rsi/rsi_91x_sdio.c:288:20: error: 'MMC_STATE_HIGHSPEED'
undeclared (first use in this function)
Thankyou Stephen,
On 21/04/14 23:20, Stephen Boyd wrote:
Please turn on lockdep (PROVE_LOCKING) and sleeping while atomic checks
(DEBUG_ATOMIC_SLEEP). You cannot call clk_set_rate() in atomic context.
You are correct, there is a spinlock taken just before entering this
code. I will fix this in
On Tue, April 22, 2014, Ulf Hansson wrote:
On 22 April 2014 08:57, Seungwon Jeon tgih@samsung.com wrote:
As commit 3957848(mmc: drop the speed mode of card's state) applies,
this change should be followed.
drivers/net/wireless/rsi/rsi_91x_sdio.c:288:20: error:
'MMC_STATE_HIGHSPEED'
From: Emilio López emi...@elopez.com.ar
This commit implements .determine_rate, so that our factor clocks can be
reparented when needed.
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/clk/sunxi/clk-factors.c | 36
From: Emilio López emi...@elopez.com.ar
HdG: add header exporting clk_sunxi_mmc_phase_control
Signed-off-by: Emilio López emi...@elopez.com.ar
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/clk/sunxi/clk-sunxi.c | 35 +++
include/linux/clk/sunxi.h
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 14 ++
arch/arm/boot/dts/sun5i-a13.dtsi | 7 +++
2 files changed, 21
Hi All,
Here is v8 of the sunxi-mmc patch-set David Lanzendörfer and I have been
working on.
The first 2 patches are depenencies which should go in through the clk tree,
Mike can you pick these 2 up please ? :
clk: sunxi: factors: automatic reparenting support
Is uncontroversial and has been
From: David Lanzendörfer david.lanzendoer...@o2s.ch
Add nodes for the 3 mmc controllers found on A10s SoCs and for the 2 mmc
controllers found on A13 SoCs.
Signed-off-by: David Lanzendörfer david.lanzendoer...@o2s.ch
Signed-off-by: Hans de Goede hdego...@redhat.com
---
mmc0 is the only controller actually being used on boards, so limit the
pin-muxing options to that.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi
Add nodes for the 4 mmc controllers found on A31 SoCs to
arch/arm/boot/dts/sun6i-a31.dtsi.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 52
1 file changed, 52 insertions(+)
diff --git
Tested on a subset of these boards, for the others boards the settings match
the ones of the tested boards according to the original firmware fex files.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10-a1000.dts | 9 +
From: David Lanzendörfer david.lanzendoer...@o2s.ch
Add nodes for the 4 mmc controllers found on A10 SoCs to
arch/arm/boot/dts/sun4i-a10.dtsi.
Signed-off-by: David Lanzendörfer david.lanzendoer...@o2s.ch
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun4i-a10.dtsi | 36
From: David Lanzendörfer david.lanzendoer...@o2s.ch
The Allwinner sunxi mmc host uses dma in bus-master mode using a built-in
designware idmac controller, which is identical to the one found in the mmc-dw
hosts. However the rest of the host is not identical to mmc-dw, it deals with
sending stop
Add clk-nodes for the mmc clocks.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index d45efa7..12bcc17
Tested on a Mele A1000G Quad.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31-m9.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts
b/arch/arm/boot/dts/sun6i-a31-m9.dts
index c95ee77..a188721 100644
---
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi
Add nodes for the 4 mmc controllers found on A20 SoCs to
arch/arm/boot/dts/sun7i-a20.dtsi.
Signed-off-by: David Lanzendörfer david.lanzendoer...@o2s.ch
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 36
1 file changed,
The cd pin settings have been taken from the original firmware fex files,
and have been confirmed to work on the actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 32
Add a new sun6i-a31-m9 dts file for the Mele M9 / Mele A1000G Quad. These
HTPCs use the same board in a different case, for more details see:
http://linux-sunxi.org/Mele_M9
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/Makefile | 1 +
This adds pin-muxing info for the mmc controller / port combinations which
are known to be used on actual boards.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 21 +
1 file changed, 21 insertions(+)
diff --git
On 22 April 2014 12:53, Seungwon Jeon tgih@samsung.com wrote:
On Tue, April 22, 2014, Ulf Hansson wrote:
On 22 April 2014 08:57, Seungwon Jeon tgih@samsung.com wrote:
As commit 3957848(mmc: drop the speed mode of card's state) applies,
this change should be followed.
Hi Hans,
El 22/04/14 08:01, Hans de Goede escribió:
Hi All,
Here is v8 of the sunxi-mmc patch-set David Lanzendörfer and I have been
working on.
The first 2 patches are depenencies which should go in through the clk tree,
Mike can you pick these 2 up please ? :
clk: sunxi: factors:
Hi,
On 04/22/2014 02:07 PM, Emilio López wrote:
Hi Hans,
El 22/04/14 08:01, Hans de Goede escribió:
Hi All,
Here is v8 of the sunxi-mmc patch-set David Lanzendörfer and I have been
working on.
The first 2 patches are depenencies which should go in through the clk tree,
Mike can you
On Tue, April 22, 2014, Ulf Hansson wrote:
On 22 April 2014 12:53, Seungwon Jeon tgih@samsung.com wrote:
On Tue, April 22, 2014, Ulf Hansson wrote:
On 22 April 2014 08:57, Seungwon Jeon tgih@samsung.com wrote:
As commit 3957848(mmc: drop the speed mode of card's state) applies,
Hi Srini,
On 04/21/2014 05:43 PM, srinivas.kandaga...@linaro.org wrote:
This patches are tested in PIO mode on IFC8064 board with both eMMC and
external SD card. I would appreciate any feedback/suggestions on the overall
approach.
Is a non-upstream device tree needed to reproduce your test
I am not sure it's safe to carry this patch through Chris' mmc tree
due to merge conflicts with John's wireless tree.
Though, since you have changed the mmc_card_highspeed() function to be
named to mmc_card_hs(), we need to work out the dependency.
We have some options to handle
Hi Christopher,
On 22/04/14 13:58, Christopher Covington wrote:
Hi Srini,
On 04/21/2014 05:43 PM, srinivas.kandaga...@linaro.org wrote:
This patches are tested in PIO mode on IFC8064 board with both eMMC and
external SD card. I would appreciate any feedback/suggestions on the overall
On Monday 21 April 2014 11:02 PM, Felipe Balbi wrote:
Hi,
On Wed, Mar 26, 2014 at 07:04:45PM -0500, Felipe Balbi wrote:
this series lets us access the newer registers introduced
back in OMAP4 which give us some valid information about
the OMAP HSMMC IP like max block size, support for ADMA,
Hi,
On Tue, Apr 22, 2014 at 09:00:12PM +0530, Balaji T K wrote:
On Monday 21 April 2014 11:02 PM, Felipe Balbi wrote:
Hi,
On Wed, Mar 26, 2014 at 07:04:45PM -0500, Felipe Balbi wrote:
this series lets us access the newer registers introduced
back in OMAP4 which give us some valid
Data errors are completely expected during tuning. Printing them out
is confusing people looking at the kernel logs. They see things like:
[3.613296] dwmmc_exynos 1220.dwmmc0: data error, status 0x0088
...and they think something is wrong with their hardware.
Remove the
Hi Doug,
On Wed, Apr 23, 2014 at 5:21 AM, Doug Anderson diand...@chromium.org wrote:
Data errors are completely expected during tuning. Printing them out
is confusing people looking at the kernel logs. They see things like:
[3.613296] dwmmc_exynos 1220.dwmmc0: data error, status
Hi Yuvaraj,
On Mon, Mar 24, 2014 at 10:12 AM, Yuvaraj Kumar yuvaraj...@gmail.com wrote:
On Mon, Mar 24, 2014 at 9:59 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi, Yuvaraj.
NACK. we can use mmc_of_parese().
Thanks Jaehoon for the pointer.I will use mmc_of_parse().
Are you planning to
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