On 12 June 2014 07:25, Guennadi Liakhovetski wrote:
> Hi Linus,
>
> On Wed, 11 Jun 2014, Linus Torvalds wrote:
>
>> On Tue, Jun 10, 2014 at 2:50 PM, Linus Torvalds
>> wrote:
>> >
>> > Also, that new drivers/mmc/host/usdhi6rol0.c driver is one f*cking
>> > noisy compile, and knisr certainly has ne
Hi Linus,
On Wed, 11 Jun 2014, Linus Torvalds wrote:
> On Tue, Jun 10, 2014 at 2:50 PM, Linus Torvalds
> wrote:
> >
> > Also, that new drivers/mmc/host/usdhi6rol0.c driver is one f*cking
> > noisy compile, and knisr certainly has never been tested in a 64-bit
> > environment. Please either fix i
On Tue, Jun 10, 2014 at 2:50 PM, Linus Torvalds
wrote:
>
> Also, that new drivers/mmc/host/usdhi6rol0.c driver is one f*cking
> noisy compile, and knisr certainly has never been tested in a 64-bit
> environment. Please either fix it, or make it depend on BROKEN.
Guys? Seriously, if that driver is
Hi,
On Wed, Jun 11 2014, Guennadi Liakhovetski wrote:
>> Please send fixes for the compiler warnings, potential-null mrq,
>
> Sure, it's on my todo for Saturday, is this ok?
Cool, thanks.
>> and
>> perhaps add an ARCH_ dependency to stop this building on x86_64.
>
> Is there a specific reason to
Fix a number of wrong print formats.
Signed-off-by: Guennadi Liakhovetski
---
Chris, the "possibl NULL mrq" warning is bogus. It cannot be NULL in the
USDHI6_WAIT_FOR_STOP state. But if you prefer, I can fix that one too.
drivers/mmc/host/usdhi6rol0.c | 10 +-
1 file changed, 5 insert
On Wed, 11 Jun 2014, Chris Ball wrote:
> Hi Guennadi,
>
> On Sat, May 31 2014, Guennadi Liakhovetski wrote:
> > This patch adds a driver for the Renesas usdhi6rol0 SD/SDIO host controller
> > in both PIO and DMA modes.
> >
> > Signed-off-by: Guennadi Liakhovetski
> > ---
> >
> > v4: replaced sev
Hi Guennadi,
On Sat, May 31 2014, Guennadi Liakhovetski wrote:
> This patch adds a driver for the Renesas usdhi6rol0 SD/SDIO host controller
> in both PIO and DMA modes.
>
> Signed-off-by: Guennadi Liakhovetski
> ---
>
> v4: replaced several numerical values with macros
Please send fixes for the
Hi Ulf,
On 11/06/14 18:35, Ulf Hansson wrote:
Thanks Srinivas, great work!
We didn't reach 3.16, but now I have applied this for my next branch
intended for 3.17.
That's great.
For you information, the v6 patchset needed a minor re-base, and one
of the patches had a checkpatch error. I ma
On 2 June 2014 11:03, wrote:
> From: Srinivas Kandagatla
>
> Thankyou Linus W, Ulf H, Russell K and everyone for reviewing RFC to v5
> patches.
>
> This patch series adds Qualcomm SD Card Controller support in pl180 mmci
> driver. QCom SDCC is basically a pl180, but bit more customized, some of
On Mon, Jun 2, 2014 at 11:10 AM, wrote:
> From: Srinivas Kandagatla
>
> This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm
> SDCC controller is pl180, but amba id registers read 0x0's.
> The plan is to remove SDCC driver totally and use mmci as the main SD
> controller d
On Mon, Jun 2, 2014 at 11:10 AM, wrote:
> From: Srinivas Kandagatla
>
> MCIFIFOCNT register behaviour on Qcom chips is very different than the other
> pl180 integrations. MCIFIFOCNT register contains the number of
> words that are still waiting to be transferred through the FIFO. It keeps
> dec
On Mon, Jun 2, 2014 at 11:09 AM, wrote:
> From: Srinivas Kandagatla
>
> On Controllers like Qcom SD card controller where cclk is mclk and mclk should
> be directly controlled by the driver.
>
> This patch adds support to control mclk directly in the driver, and also
> adds explicit_mclk_contro
On Mon, Jun 2, 2014 at 11:09 AM, wrote:
> From: Srinivas Kandagatla
>
> Some of the controller have maximum supported frequency, This patch adds
> support in variant data structure to specify such restrictions. This
> gives more flexibility in calculating the f_max before passing it to
> mmc-co
On Mon, Jun 2, 2014 at 11:08 AM, wrote:
> From: Srinivas Kandagatla
>
> On Qcom SD Card controller POWER, CLKCTRL, DATACTRL and COMMAND registers
> should be updated in MCLK domain, and writes to these registers must be
> separated by three MCLK cycles. This resitriction is not applicable for
>
On Mon, Jun 2, 2014 at 11:08 AM, wrote:
> From: Srinivas Kandagatla
>
> This patch adds a Qualcomm SD Card controller specific register variations
> to header file. Qualcomm SDCC controller is pl180, with slight changes in
> the register layout from standard pl180 register set.
>
> Signed-off-b
Hi Linus,
On 06/11/2014 11:00 AM, Linus Walleij wrote:
> On Mon, May 26, 2014 at 9:47 AM, Hans de Goede wrote:
>
>> For level triggered gpio interrupts we need to use handle_fasteoi_irq,
>> like we do with the irq-sunxi-nmi driver. This is necessary to give threaded
>> interrupt handlers a chanc
On Mon, May 26, 2014 at 9:47 AM, Hans de Goede wrote:
> For level triggered gpio interrupts we need to use handle_fasteoi_irq,
> like we do with the irq-sunxi-nmi driver. This is necessary to give threaded
> interrupt handlers a chance to actuall clear the source of the interrupt
> (which may inv
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