Hi, Prabu.
On 10/15/2014 09:05 PM, Vivek Gautam wrote:
> Hi Prabu,
>
>
> On Tue, Oct 14, 2014 at 5:41 PM, Alim Akhtar wrote:
>> Hi Prahu,
>> Thanks for a quick re-spin o the patch.
>> One last comment, this is more of a information seek.
>> On Thu, Oct 9, 2014 at 1:09 PM, Prabu Thangamuthu
>>
Hi, Doug.
It looks good to me.
Acked-by: Jaehoon Chung
On 10/15/2014 01:39 AM, Doug Anderson wrote:
> The "set_ios" function is called with a clock of 0 when the clock is
> turning off. There's no reason to go through all the extra Rockchip
> logic (whose goal is to make sure DIV is 0 or 1) in
For eMMC 5.0 compliant device, firmware version is stored in ext_csd.
Report firmware as a 64bit hexa decimal. Vendor can use hexa or ascii
string to report firmware version.
Also add FFU related EXT_CSD register and note if the device is FFU capable.
Signed-off-by: Gwendal Grignou
---
drivers/m
Added quirk SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 present in controller.
Removed udelay in write ops by using shadow registers for 16 bit
accesses to 32-bit registers (where necessary).
Optimized 32-bit operations when doing 8/16 register accesses.
Signed-off-by: Scott Branden
---
drivers/mmc/host/
Hi Prabu,
On Tue, Oct 14, 2014 at 5:41 PM, Alim Akhtar wrote:
> Hi Prahu,
> Thanks for a quick re-spin o the patch.
> One last comment, this is more of a information seek.
> On Thu, Oct 9, 2014 at 1:09 PM, Prabu Thangamuthu
> wrote:
>> Synopsys DW_MMC IP core supports Internal DMA Controller w