Hi, Doug,
On 2014/10/30 12:49, Doug Anderson wrote:
> Addy,
>
> On Wed, Oct 29, 2014 at 9:41 PM, Doug Anderson wrote:
>> You can avoid a lot of "if" tests if you just add a new "sdio->id"
>
> Whoops, I mean "slot->sdio_id"
>
To use "slot->sdio_id", I think the subject must be changed.
So I wi
Make the shift calculations consistent rather than having different
implementations to calculate the same thing.
Signed-off-by: Scott Branden
---
drivers/mmc/host/sdhci-bcm2835.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/host/sdhci-bcm2
Add a verify option to driver to print out an error message if a
potential back to back write could cause a clock domain issue.
Signed-off-by: Scott Branden
---
drivers/mmc/host/Kconfig |9 +
drivers/mmc/host/sdhci-bcm2835.c | 17 +
2 files changed, 26 inser
The bcm2835 has clock domain issues when back to back writes to certain
registers are written. The existing driver works around this issue with
udelay. A more efficient method is to store the 8 and 16 bit writes
to the registers affected and then write them as 32 bits at the appropriate
time.
Si
Group the read and write functions to improve readability. Now all
similar functions are grouped together to evaluate behaviours.
Signed-off-by: Scott Branden
---
drivers/mmc/host/sdhci-bcm2835.c | 61 +++---
1 file changed, 31 insertions(+), 30 deletions(-)
d
SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 is missing and needed for this controller.
Signed-off-by: Scott Branden
---
drivers/mmc/host/sdhci-bcm2835.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-bcm2835.c b/drivers/mmc/host/sdhci-bcm2835.c
index 11af2
This patch contains driver cleanup of sdhci-bcm2835.
Please note that this has not actually been tested on bcm2835 yet.
Testing comes from other devices with the same sdhci controller.
This patch is being put out for testing and acceptance on the 2835.
Please test and comment.
Scott Branden (5):
SDHC controller in AMD chipsets require SDHC transfer mode
register to be cleared for commands without data. The issue was
uncovered during testing eMMC cards on KB/ML based platforms.
Signed-off-by: Vincent Wan
Signed-off-by: Arindam Nath
Tested-by: Vikram B
Tested-by: Raghavendra Swamy
---
Addy,
On Wed, Oct 29, 2014 at 9:41 PM, Doug Anderson wrote:
> You can avoid a lot of "if" tests if you just add a new "sdio->id"
Whoops, I mean "slot->sdio_id"
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More major
Addy,
On Wed, Oct 29, 2014 at 7:21 PM, Addy Ke wrote:
> --- a/drivers/mmc/host/dw_mmc.c
> +++ b/drivers/mmc/host/dw_mmc.c
> @@ -778,6 +778,12 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot,
> bool force_clkinit)
> u32 div;
> u32 clk_en_a;
> u32 sdmmc_cmd_bits =
Hi, Addy.
On 10/30/2014 11:21 AM, Addy Ke wrote:
> This patch add a quirk: DW_MCI_QUIRK_SDIO_INT_24BIT.
>
> The bit of sdio interrupt is 16 in designware implementation, but
> is 24 in RK3288. To support RK3288 mmc controller, we need add
> a quirk for it.
>
> Signed-off-by: Addy Ke
> ---
> dr
Add runtime pm support to atmel mci controller.
Use runtime pm APIs to enable/disable atmel mci's clock.
Use runtime autosuspend APIs to enable auto suspend delay.
Signed-off-by: Wenyou Yang
---
Changes v1 -> v2:
* Adjust the APIs and invoking sequence to avoid clock unbalance issue during
->pro
This patch add a quirk: DW_MCI_QUIRK_SDIO_INT_24BIT.
The bit of sdio interrupt is 16 in designware implementation, but
is 24 in RK3288. To support RK3288 mmc controller, we need add
a quirk for it.
Signed-off-by: Addy Ke
---
drivers/mmc/host/dw_mmc.c | 32 +++-
driv
Hello Ulf,
Thank you very much for so many comments.
I will do it.
> -Original Message-
> From: Ulf Hansson [mailto:ulf.hans...@linaro.org]
> Sent: Wednesday, October 29, 2014 6:06 PM
> To: Yang, Wenyou
> Cc: Chris Ball; Kevin Hilman; Ferre, Nicolas; Desroches, Ludovic; linux-mmc;
> lin
On Wed, Oct 29, 2014 at 03:09:36PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series, sent before by Morimoto-san, removes unnecessary MMC
> options
> from the DTS files that are already set automatically by the driver, based on
> the compatible property value. Note
Hi
I think your suggestion is looks good
I reconsideration my patch & original src
Although Original src is not recommendations of JDEC
Actually change setting order of host controller & emmc device
There would be no problem.
So we drop this patch
Sorry for confusing. Thanks for the helpful
On 21.10.2014 11:22, Sebastian Hesselbarth wrote:
Marvell Berlin BG2 has three, BG2CD just one pxav3 compatible
sdhci controllers, add them to the corresponding DT SoC
includes.
Signed-off-by: Sebastian Hesselbarth
Applied the three DT patches to berlin/dt.
Sebastian
---
Cc: Chris Ball
Cc
Hi Prabu,
On Mon, Oct 20, 2014 at 12:42 PM, Prabu Thangamuthu
wrote:
> Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address
> mode from IP version 2.70a onwards.
> Updated the driver to support IDMAC 64-bit addressing mode.
>
> Signed-off-by: Prabu Thangamuthu
Thanks!!
T
From: Kuninori Morimoto
As of commit 423f6c2e977de73b ("mmc: sdhi: update sh_mobile_sdhi_of_data
for r8a7790"), the driver takes care of r8a7790 specific MMC options.
Hence they can be removed from the dtsi.
Signed-off-by: Kuninori Morimoto
[geert: Rebased, reworded, added reference]
Signed-off
From: Kuninori Morimoto
As of commit 81bbbc7278fa109f ("mmc: sdhi: update sh_mobile_sdhi_of_data
for r8a7779"), the driver takes care of r8a7779 specific MMC options.
Hence they can be removed from the dtsi.
Signed-off-by: Kuninori Morimoto
[geert: Rebased, reworded, added reference]
Signed-off
Hi Simon, Magnus,
This patch series, sent before by Morimoto-san, removes unnecessary MMC options
from the DTS files that are already set automatically by the driver, based on
the compatible property value. Note that these options were never added on
r8a7791, which gained SDHI device nodes
From: Kuninori Morimoto
As of commit b3a5d4ce65162d27 ("mmc: sdhi: update sh_mobile_sdhi_of_data
for r8a7778), the driver takes care of r8a7778 specific MMC options.
Hence they can be removed from the dtsi.
Signed-off-by: Kuninori Morimoto
[geert: Rebased, reworded, added reference]
Signed-off-
On 29 October 2014 03:15, Wenyou Yang wrote:
Hi Wenyou,
Could you please provide some more information in the commit message.
> Signed-off-by: Wenyou Yang
> ---
> drivers/mmc/host/atmel-mci.c | 116
> ++
> 1 file changed, 94 insertions(+), 22 deletion
On 29/10/14 01:30, 유한경 wrote:
> Hi I'm Hankyung Yu
>
> I will answer instead Chanho Min
>
> HS200 mode right thing to support less than 52Mhz
>
> However CLK <-> DATA delay timing is dependent on the clock.
>
> So only lower clock without adjusting the timing and mode of a control h/w
> ever th
On 28/10/14 17:38, Arnd Bergmann wrote:
> On Tuesday 28 October 2014 17:14:25 Adrian Hunter wrote:
>> On 28/10/2014 5:08 p.m., Arnd Bergmann wrote:
>>> On Tuesday 28 October 2014 16:14:46 Adrian Hunter wrote:
On 28/10/2014 3:54 p.m., Arnd Bergmann wrote:
> On Tuesday 28 October 2014 13:41:
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