Re: [PATCH v2 0/6] UHS-I support for sh_mobile_sdhi

2015-06-11 Thread Ben Hutchings
On Thu, 2015-06-11 at 11:49 +0900, Simon Horman wrote: On Thu, Jun 11, 2015 at 12:57:57AM +0100, Ben Hutchings wrote: On Wed, 2015-06-10 at 11:16 +0200, Ulf Hansson wrote: On 10 June 2015 at 01:21, Ben Hutchings ben.hutchi...@codethink.co.uk wrote: This series adds support for UHS-I

RE: [PATCH v2] mmc: enable Enhance Strobe for HS400.

2015-06-11 Thread Sun, Yi Y
Hi, Thanks for review and sorry for late to reply. I am on a business travel. -Original Message- From: ritesh.harj...@gmail.com [mailto:ritesh.harj...@gmail.com] On Behalf Of Ritesh Harjani Sent: Saturday, June 06, 2015 5:50 AM To: Sun, Yi Y Cc: linux-mmc@vger.kernel.org;

Re: [PATCH] mmc: sdhci: Clear MMC_CAP_1_8V_DDR in the SDHCI_QUIRK2_NO_1_8_V case

2015-06-11 Thread Fabio Estevam
Hi Ulf, On Thu, Jun 11, 2015 at 10:24 AM, Fabio Estevam fabio.este...@freescale.com wrote: - if (host-quirks2 SDHCI_QUIRK2_NO_1_8_V) + if (host-quirks2 SDHCI_QUIRK2_NO_1_8_V) { caps[1] = ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |

Re: [PATCH v2] mmc: meson: Add driver for the SD/MMC host found on Amlogic MesonX SoCs

2015-06-11 Thread Carlo Caione
On Wed, Jun 10, 2015 at 3:44 PM, Daniel Drake dr...@endlessm.com wrote: On Wed, Jun 10, 2015 at 2:53 AM, Carlo Caione ca...@caione.org wrote: +static int meson_mmc_map_dma(struct meson_mmc_host *host, +struct mmc_data *data, +unsigned int

[PATCH V2 2/3] i2c-piix4: Use Macro for AMD CZ SMBus device ID

2015-06-11 Thread Wan ZongShun
Change AMD CZ SMBUS device ID from 0x790b to use Macro definition Signed-off-by: Wan ZongShun vincent@amd.com --- drivers/i2c/busses/i2c-piix4.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index

[PATCH V2 1/3] pci_ids: Add AMD KERNCZ device ID support

2015-06-11 Thread Wan ZongShun
The KERNCZ is new AMD SB/FCH generation name, like HUDSON2. We will adopt 0x790b as device ID since from this gereration. Signed-off-by: Wan ZongShun vincent@amd.com --- include/linux/pci_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/pci_ids.h

[PATCH] mmc: sdhci: Clear MMC_CAP_1_8V_DDR in the SDHCI_QUIRK2_NO_1_8_V case

2015-06-11 Thread Fabio Estevam
From: Kevin Lemoi kevin.le...@savant.com SDHCI_QUIRK2_NO_1_8_V flag should disable MMC_CAP_1_8V_DDR. Otherwise we get the following errors when accessing eMMC on a mx6sl board: mmc0: MAN_BKOPS_EN bit is not set mmc0: power class selection to bus width 8 ddr 4 failed mmc0: error -110 whilst

[PATCH V2 3/3] SDHCI: Change AMD SDHCI quirk application scope

2015-06-11 Thread Wan ZongShun
Change this quirk to apply to AMD Carrizo platform. Signed-off-by: Wan ZongShun vincent@amd.com Tested-by: Nath, Arindam arindam.n...@amd.com Tested-by: Ramesh, Ramya ramya.ram...@amd.com --- drivers/mmc/host/sdhci-pci.c | 25 - 1 file changed, 24 insertions(+), 1

Re: [PATCH V2 2/3] i2c-piix4: Use Macro for AMD CZ SMBus device ID

2015-06-11 Thread Wolfram Sang
On Thu, Jun 11, 2015 at 08:11:46PM +0800, Wan ZongShun wrote: Change AMD CZ SMBUS device ID from 0x790b to use Macro definition Signed-off-by: Wan ZongShun vincent@amd.com I think it makes sense that this patch goes in via MMC. This I2C change is trivial, but for MMC there is more to

[PATCH] mmc: sdhci-esdhc-imx: Do not set MMC_CAP_1_8V_DDR in the 'no-1-8-v' case

2015-06-11 Thread Fabio Estevam
From: Fabio Estevam fabio.este...@freescale.com Since commit e2997c944dbdff3f (mmc: sdhci-esdhc-imx: add MMC_CAP_1_8V_DDR for mx6) the driver sets the MMC_CAP_1_8V_DDR flag unconditionally on mx6, but we should not do this when the 'no-1-8-v' property is passed via device tree. This causes the

[PATCH] mmc: host: Fix mmc_alloc_host() error path

2015-06-11 Thread Fabio Estevam
From: Fabio Estevam fabio.este...@freescale.com If mmc_gpio_alloc() fails we miss to call 'kfree(host)', so rearrange the error path to fix it. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- drivers/mmc/core/host.c | 18 ++ 1 file changed, 10 insertions(+), 8

Re: [PATCH] mmc: sdhci-esdhc-imx: Do not set MMC_CAP_1_8V_DDR in the 'no-1-8-v' case

2015-06-11 Thread Dong Aisheng
Hi Fabio, On Thu, Jun 11, 2015 at 07:08:23PM -0300, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com Since commit e2997c944dbdff3f (mmc: sdhci-esdhc-imx: add MMC_CAP_1_8V_DDR for mx6) the driver sets the MMC_CAP_1_8V_DDR flag unconditionally on mx6, but we should not do

[GIT PULL] Update dw-mmc controller

2015-06-11 Thread Jaehoon Chung
Dear, Ulf. Could you pull this patch for mmc-next? Best Regards, Jaehoon Chung The following changes since commit 5fd26c7ecb32082745b0bd33c8e35badd1cb5a91: mmc: sdhci: Restore behavior while creating OCR mask (2015-06-08 09:49:57 +0200) are available in the git repository at: