X-pstn-levels: (S:99.9/99.9 CV:99.9000 FC:95.5390 LC:95.5390
R:95.9108 P:95.9108 M:97.0282 C:98.6951 )
X-pstn-settings: 2 (0.5000:0.0750) s cv GT3 gt2 gt1 r p m
X-pstn-addresses: from madhu...@ti.com [db-null]
X-CM: TI mail servers
Here it is a plain text email. Just check.
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On Tue, Dec 7, 2010 at 5:27 PM, Paul Walmsley p...@pwsan.com wrote:
In the OMAP HSMMC driver, the code path entered via mmc_host_enable() can
include register accesses to the HSMMC IP block. For this to work, both
the device interface clock and functional clock need to be enabled before
Paul,
Last I tested OFF mode was after Adrian's power saving series was merged. I
tested it on Kevin PM branch then and it was functional on my omap3 board.
I need to check on the latest commit.
Did you see this problem in suspend/resume path or the cpuidle path?
Regards,
Madhu
On Tue, Dec 7,
