The tuning in latest tree is broken.
This patch fixed it and add HS200 support for imx usdhc.
Patch 2 had been sent out in:
[PATCH 0/7] mmc: sdhci-esdhc-imx: fix acmd23 unwork and ddr not supported on
sabresd issues
No changes since that.
Dong Aisheng (2):
mmc: sdhci: replace msleep
Add support for eMMC 4.5 cards to work on hs200 mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index
on a Toshiba UHS and eMMC4.5 card
after this change. Thus, for the time sensitive tuning process, change it
back to mdelay as before.
The breaking patch is:
404aceb mmc: sdhci: Get rid of mdelay()s where it is safe and makes sense
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host
We should not clear tuning bits during reset or the SD3.0/eMMC4.5 card
working on UHS mode may not work after reset since the former tuning
settings was lost.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |7 ++-
1 files changed, 6 insertions
Since we're using common esdhc_send_command for tuning commands and
the core code will call pm_runtime_put after command is finished.
So we add a pm_runtime_get_sync here to get the blance.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |1 +
1 files
It is helpful for platforms code to use to elimiate duplicated code.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-pltfm.c |6 --
drivers/mmc/host/sdhci-pltfm.h |2 ++
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci
on imx6sl evk
eMMC DDR on imx6q sabresd
SDHC on imx6q sabresd
Dong Aisheng (5):
mmc: sdhci-pltfm: export pltfm suspend/resume api
mmc: sdhci-esdhc-imx: tuning bits should not be cleared during reset
mmc: sdhci-esdhc-imx: clear SDHCI_CTRL_EXEC_TUNING should not affect
other bits
mmc: sdhci
The root clock will be disabled in runtime pm which can be used to save power.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 53 ++-
1 files changed, 51 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host
drivers/mmc/core/mmc_ops.c: In function '__mmc_switch':
drivers/mmc/core/mmc_ops.c:484:11: warning: 'status' may be used uninitialized
in this function [-Wuninitialized]
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/core/mmc_ops.c |2 +-
1 files changed, 1 insertions
On Wed, Oct 30, 2013 at 07:55:32AM -0700, Ulf Hansson wrote:
Dong Aisheng b29...@freescale.com skrev:
drivers/mmc/core/mmc_ops.c: In function '__mmc_switch':
drivers/mmc/core/mmc_ops.c:484:11: warning: 'status' may be used
uninitialized in this function [-Wuninitialized]
Signed-off
Hi Jackey,
On Mon, Oct 28, 2013 at 10:34 AM, Jackey Shen jackey.shen...@gmail.com wrote:
Hi Dong
On Fri, Oct 18, 2013 at 2:59 PM, Dong Aisheng b29...@freescale.com wrote:
Hi Jackey,
The imx6sl SD controller supports SDIO 3.0.
I've verified it with a Broadcom SDIO 3.0 WiFi card and it can
On Wed, Oct 23, 2013 at 10:33:28AM +0800, Shawn Guo wrote:
On Mon, Oct 21, 2013 at 10:27:01PM +0800, Dong Aisheng wrote:
The auto cmd settings bits should be cleared before sending new commands
or we may receive command timeout error for normal commands due to wrongly
pre-sent auto cmd
On Wed, Oct 23, 2013 at 10:51:48AM +0800, Shawn Guo wrote:
On Mon, Oct 21, 2013 at 10:27:05PM +0800, Dong Aisheng wrote:
We should use '|=' instead '=', or it may over write
the original caps assigned before this line.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc
The MMC_CAP_UHS_DDR50 must work on 1.8v.
However, the eMMC DDR mode can work on either 1.8v or 3.3v and
should not depend on UHS_DDR50.
So get rid of this limitation to let controller without 1.8v
signal voltage support can also work for eMMC DDR mode if it claims.
Signed-off-by: Dong Aisheng b29
Add support for eMMC 4.5 cards to work on hs200 mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index
We should use '|=' instead '=', or it may over write
the original caps assigned before this line.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
The i.MX6 supports 1.8v/3.3v eMMC DDR mode, so add this flag.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
Used to read out the correct value of SDHCI_TRANSFER_MODE register
for upper layer.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
: unknown partition table
mmc2: Timeout waiting for hardware interrupt.
mmcblk1boot0: unknown partition table
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers
not support
1.8v signal voltage can also support eMMC DDR mode.
Patch 7 add eMMC hs200 support
Dong Aisheng (7):
mmc: sdhci: clear auto cmd setting bits for no data cmds
mmc: sdhci-esdhc-imx: add SDHCI_TRANSFER_MODE read function
ARM: dts: sabresd: add usdhc4 support
mmc: sdhci-esdhc-imx
Add usdhc4 support which has an eMMC card mounted on board.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
arch/arm/boot/dts/imx6qdl-sabresd.dtsi |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
b/arch/arm/boot/dts
Hi John,
You need apply this patch series first which introduced esdhc_is_usdhc.
http://permalink.gmane.org/gmane.linux.kernel.mmc/23074
Please refer to Chris tree:
https://git.kernel.org/cgit/linux/kernel/git/cjb/mmc.git/log/?h=mmc-next
Regards
Dong Aisheng
On Tue, Oct 22, 2013 at 12:01 AM
Hi Jackey,
The imx6sl SD controller supports SDIO 3.0.
I've verified it with a Broadcom SDIO 3.0 WiFi card and it can be
identified as SDR104 mode.
Regards
Dong Aisheng
On Fri, Oct 18, 2013 at 02:04:01PM +0800, Jackey Shen wrote:
Hi John,
Does your SD host controller support 3.0 card? As I
(-)
--
1.7.9.5
Acked-by: Dong Aisheng b29...@freescale.com
I will rebase my mx6sl std tuning patch series based on it
and send out again.
Regards
Dong Aisheng
--
To unsubscribe from this list: send the line unsubscribe linux-mmc in
the body of a message to majord...@vger.kernel.org
More
-by: Dong Aisheng b29...@freescale.com
---
.../devicetree/bindings/mmc/fsl-imx-esdhc.txt |5 +
drivers/mmc/host/sdhci-esdhc-imx.c | 18 ++
include/linux/platform_data/mmc-esdhc-imx.h|1 +
3 files changed, 24 insertions(+), 0 deletions(-)
diff
on Shawn's patch series
[PATCH v2 0/4] mmc: sdhci-esdhc-imx: eliminate enum imx_esdhc_type
Dong Aisheng (8):
mmc: sdhci-esdhc-imx: add std tuning support for mx6sl
mmc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6sl
mmc: sdhci: report error once the maximum tuning loops exhausted
by 2
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 17 ++---
1 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 52c0760..c5c26bd 100644
--- a/drivers
Remove unneeded call of call sdhci_enable_preset_value when having
SDHCI_QUIRK2_PRESET_VALUE_BROKEN.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc
The original code missed to report an error when the maximum tuning loops
exhausted
or timeout, it will cause the upper layer to wrongly think the tuning process
is passed.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci.c |1 +
1 files changed, 1 insertions
The i.MX6 does not support preset value feature.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index
When reading CAP_1 register for mx6sl, ignore bit[0-15] as it stores
CAP_2 register value which is new introduced in mx6sl.
Without this fix, the max clock for mx6sl may not be correct since
it's wrongly calculated by reading CAP_1 register.
Signed-off-by: Dong Aisheng b29...@freescale.com
with new tuning bits
defined in SDHCI_ACMD12_ERR register.
Note: mx6sl can also work on the old manually tuning mode as mx6q/dl if
not enable standard tuning mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 90 +---
1
The imx6q/dl supports SDR50 tunning, enable it for a better timing
on SDR50 mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc
On Fri, Oct 18, 2013 at 07:33:50PM +0800, Shawn Guo wrote:
On Fri, Oct 18, 2013 at 06:54:14PM +0800, Dong Aisheng wrote:
The mx6sl supports standard sdhci tuning, then esdhc_executing_tuning
is only needed for mx6q/dl. We introduce is_imx6_usdhc() and
is_imx6sl_usdhc() to handle
On Fri, Oct 18, 2013 at 07:57:56PM +0800, Shawn Guo wrote:
On Fri, Oct 18, 2013 at 07:30:47PM +0800, Dong Aisheng wrote:
On Fri, Oct 18, 2013 at 07:42:35PM +0800, Shawn Guo wrote:
On Fri, Oct 18, 2013 at 06:54:18PM +0800, Dong Aisheng wrote:
The DLL(Delay Line) is newly added to assist
On Fri, Oct 18, 2013 at 07:42:35PM +0800, Shawn Guo wrote:
On Fri, Oct 18, 2013 at 06:54:18PM +0800, Dong Aisheng wrote:
The DLL(Delay Line) is newly added to assist in sampling read data.
The DLL provides the ability to programmatically select a quantized
delay (in fractions of the clock
with new tuning bits
defined in SDHCI_ACMD12_ERR register.
Note: mx6sl can also work on the old manually tuning mode as mx6q/dl if
not enable standard tuning mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
Acked-by: Shawn Guo shawn@linaro.org
---
drivers/mmc/host/sdhci-esdhc-imx.c
When reading CAP_1 register for mx6sl, ignore bit[0-15] as it stores
CAP_2 register value which is new introduced in mx6sl.
Without this fix, the max clock for mx6sl may not be correct since
it's wrongly calculated by reading CAP_1 register.
Signed-off-by: Dong Aisheng b29...@freescale.com
Acked
The original code missed to report an error when the maximum tuning loops
exhausted
or timeout, it will cause the upper layer to wrongly think the tuning process
is passed.
Signed-off-by: Dong Aisheng b29...@freescale.com
Acked-by: Shawn Guo shawn@linaro.org
---
drivers/mmc/host/sdhci.c
other patches have no change.
- rebase on Shawn's patch series
[PATCH v2 0/4] mmc: sdhci-esdhc-imx: eliminate enum imx_esdhc_type
Dong Aisheng (8):
mmc: sdhci-esdhc-imx: add std tuning support for mx6sl
mmc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6sl
mmc: sdhci: report
by 2
Signed-off-by: Dong Aisheng b29...@freescale.com
Acked-by: Shawn Guo shawn@linaro.org
---
drivers/mmc/host/sdhci-esdhc-imx.c | 17 ++---
1 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
The i.MX6 does not support preset value feature.
Signed-off-by: Dong Aisheng b29...@freescale.com
Acked-by: Shawn Guo shawn@linaro.org
---
drivers/mmc/host/sdhci-esdhc-imx.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b
-by: Dong Aisheng b29...@freescale.com
Acked-by: Shawn Guo shawn@linaro.org
---
.../devicetree/bindings/mmc/fsl-imx-esdhc.txt |5 +
drivers/mmc/host/sdhci-esdhc-imx.c | 18 ++
include/linux/platform_data/mmc-esdhc-imx.h|1 +
3 files changed
Remove unneeded call of call sdhci_enable_preset_value when having
SDHCI_QUIRK2_PRESET_VALUE_BROKEN.
Signed-off-by: Dong Aisheng b29...@freescale.com
Acked-by: Shawn Guo shawn@linaro.org
---
drivers/mmc/host/sdhci.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git
The imx6q/dl supports SDR50 tunning, enable it for a better timing
on SDR50 mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
Acked-by: Shawn Guo shawn@linaro.org
---
drivers/mmc/host/sdhci-esdhc-imx.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers
neccessary to switch
to new way on current code.
Or you may find a better fix for this issue.
Regards
Dong Aisheng
Actually, sdhci-esdhc-imx driver already has one such flag, i.e.
ESDHC_FLAG_MULTIBLK_NO_INT, but there is currently an unnecessary
translation between the flag and imx_esdhc_type
On Tue, Oct 15, 2013 at 03:18:28PM +0800, Shawn Guo wrote:
Wolfram's email address is changed to Wolfram Sang w...@the-dreams.de.
Thanks for the forward.
On Wed, Oct 09, 2013 at 07:20:08PM +0800, Dong Aisheng wrote:
The mx6sl supports standard sdhci tuning, then esdhc_executing_tuning
On Tue, Oct 15, 2013 at 03:37:06PM +0800, Shawn Guo wrote:
On Wed, Oct 09, 2013 at 07:20:13PM +0800, Dong Aisheng wrote:
The DLL(Delay Line) is newly added to assist in sampling read data.
The DLL provides the ability to programmatically select a quantized
delay (in fractions of the clock
in Chris'
tree.
Dong Aisheng (10):
ARM: dts: imx6sl: add pinctrl uhs states for usdhc
mmc: sdhci-esdhc-imx: add std tuning support for mx6sl
ARM: dts: imx6sl: change usdhc compatible with imx6sl only
mmc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6sl
mmc: sdhci: report error
This is needed for SD3.0 cards working on UHS mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
arch/arm/boot/dts/imx6sl-evk.dts | 12 -
arch/arm/boot/dts/imx6sl.dtsi| 77 ++
2 files changed, 86 insertions(+), 3 deletions(-)
diff --git
The original code missed to report an error when the maximum tuning loops
exhausted
or timeout, it will cause the upper layer to wrongly think the tuning process
is passed.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci.c |1 +
1 files changed, 1 insertions
The uSDHC on i.MX6SL is a little different from i.MX6Q,
especially on SD3.0 tuning part,
This change makes it work on i.MX6SL mode only to utilize the features
introduced in i.MX6SL.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
arch/arm/boot/dts/imx6sl.dtsi |8
1 files
by 2
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 17 ++---
1 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 8721549..b6ae5c1 100644
--- a/drivers
with new tuning bits
defined in SDHCI_ACMD12_ERR register.
Note: mx6sl can also work on the old manually tuning mode as mx6q/dl if
not enable standard tuning mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 108 +++-
1
The i.MX6 does not support preset value feature.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index
-by: Dong Aisheng b29...@freescale.com
---
.../devicetree/bindings/mmc/fsl-imx-esdhc.txt |1 +
drivers/mmc/host/sdhci-esdhc-imx.c | 18 ++
include/linux/platform_data/mmc-esdhc-imx.h|1 +
3 files changed, 20 insertions(+), 0 deletions(-)
diff --git
Remove unneeded call of call sdhci_enable_preset_value when having
SDHCI_QUIRK2_PRESET_VALUE_BROKEN.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc
When reading CAP_1 register for mx6sl, ignore bit[0-15] as it stores
CAP_2 register value which is new introduced in mx6sl.
Without this fix, the max clock for mx6sl may not be correct since
it's wrongly calculated by reading CAP_1 register.
Signed-off-by: Dong Aisheng b29...@freescale.com
The imx6q/dl supports SDR50 tunning, enable it for a better timing
on SDR50 mode.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc
), desired SD clock: %d, actual:
%d\n,
230 clock, host_clock / pre_div / div);
231
232 pre_div = 1;
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-of-esdhc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 19 +--
1 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 67eaec9..37fafd7 100644
--- a/drivers/mmc
to each platform driver
since it's not much common anymore based on Shawn's suggestion.
* dts pinctrl group name changed according to Sascha's suggestion and
rebased on latest tree.
Dong Aisheng (9):
mmc: sdhci: add hooks for platform specific tuning
mmc: sdhci: allow platform access
into platform driver itself to handle.
This can also exclude the dependency between imx and power pc on this
headfile and is easy for maintain in the future.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 35 -
drivers/mmc
bits)
timing spec:6 (sd uhs SDR104)
signal voltage: 0 (1.80 V)
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc
by SW.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
ChangeLog since v1:
* some minor changes addressed Shawn's comments
* add a bit delay for the card to be ready for the next tuning.
---
drivers/mmc/host/sdhci-esdhc-imx.c | 196 +++-
1 files changed, 195
get is 100Mhz due to pre_div is 2.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index ed00d6d..fe48ec3 100644
It helps for platform code to use it send tuning commands.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci.c |4 ++--
drivers/mmc/host/sdhci.h |2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host
This is needed for supporting ultra high speed cards like SD3.0 cards.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi |5 -
arch/arm/boot/dts/imx6qdl.dtsi | 30 ++
2 files changed, 34 insertions(+), 1
Without proper pinctrl state, the card may not be able to work
on high speed stablely. e.g. SDR104.
This patch add pinctrl state switch code according to different
uhs mode include 100mhz sate, 200mhz sate and normal state
(50Mhz and below).
Signed-off-by: Dong Aisheng b29...@freescale.com
and before the real tuning process.
Some notes for the tuning hook:
1) it needs handle lock itself if it wants to access host controller
according platform specific implementation.
2) do not need to handle runtime pm since it executes with runtime pm
get already.
Signed-off-by: Dong Aisheng b29
Hi Ulf,
Thanks for the reply.
On Fri, Sep 13, 2013 at 10:01 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 5 September 2013 18:04, Dong Aisheng donga...@gmail.com wrote:
Hi Ulf,
On Thu, Sep 5, 2013 at 3:38 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 4 September 2013 14:54, Dong
regulator's work.
Anyway, above is just my initial thoughts on your question.
Since this issue actually is not related to this series,
maybe you could create a new mail thread about this if you want
or patching is welcome for the further discussion more specific.
Regards
Dong Aisheng
--
Matt
On Thu, Sep 5, 2013 at 12:32 PM, Shawn Guo shawn@linaro.org wrote:
On Wed, Sep 04, 2013 at 08:54:12PM +0800, Dong Aisheng wrote:
The signal voltage switch follow requires to shutdown and output
s/follow/flow
clock in a specific sequence according to standard host controller
v3.0
On Thu, Sep 5, 2013 at 2:43 PM, Shawn Guo shawn@linaro.org wrote:
On Wed, Sep 04, 2013 at 08:54:17PM +0800, Dong Aisheng wrote:
This is needed for supporting ultra high speed cards like SD3.0 cards.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
arch/arm/boot/dts/imx6dl.dtsi
On Thu, Sep 5, 2013 at 11:14 AM, Shawn Guo shawn@linaro.org wrote:
On Wed, Sep 04, 2013 at 08:54:10PM +0800, Dong Aisheng wrote:
The tuning of some platforms may not follow the standard host control
spec v3.0, e.g. Freescale uSDHC on i.MX6Q/DL.
Add a hook here to allow execute platform
On Thu, Sep 5, 2013 at 2:34 PM, Shawn Guo shawn@linaro.org wrote:
On Wed, Sep 04, 2013 at 08:54:14PM +0800, Dong Aisheng wrote:
Without proper pinctrl state, the card may not be able to work
on high speed stablely. e.g. SDR104.
This patch add pinctrl state switch code according
On Thu, Sep 5, 2013 at 4:03 PM, Sascha Hauer s.ha...@pengutronix.de wrote:
On Wed, Sep 04, 2013 at 08:54:17PM +0800, Dong Aisheng wrote:
This is needed for supporting ultra high speed cards like SD3.0 cards.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
arch/arm/boot/dts/imx6dl.dtsi
On Thu, Sep 5, 2013 at 2:00 PM, Shawn Guo shawn@linaro.org wrote:
Nothing major, only a few nitpicks.
Thanks for the careful review.
Will address them all in next version.
Regards
Dong Aisheng
On Wed, Sep 04, 2013 at 08:54:13PM +0800, Dong Aisheng wrote:
Freescale i.MX6Q/DL uSDHC
Hi Ulf,
On Thu, Sep 5, 2013 at 3:38 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 4 September 2013 14:54, Dong Aisheng b29...@freescale.com wrote:
Without proper pinctrl state, the card may not be able to work
on high speed stablely. e.g. SDR104.
This patch add pinctrl state switch code
On Thu, Sep 5, 2013 at 3:33 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 4 September 2013 14:54, Dong Aisheng b29...@freescale.com wrote:
Freescale i.MX6Q/DL uSDHC clock tuning progress is a little different from
the standard tuning process defined in host controller spec v3.0.
Thus we use
Hi Ulf,
On Thu, Sep 5, 2013 at 3:42 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 4 September 2013 14:54, Dong Aisheng b29...@freescale.com wrote:
This patch series add SD3.0 support for i.MX6Q/DL.
Since freescale i.MX6Q/DL uSDHC clock tuning progress is a little different
from
is not automatically set by HW,
it's controlled by SW.
4) the clock delay for every tuning is set by SW.
Tested on i.MX6Q Sabreauto board.
The series is based on latest Linus tree.
Dong Aisheng (8):
mmc: sdhci: add hooks for platform specific tuning
mmc: sdhci: allow platform access
It helps for platform code to use it send tuning commands.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci.c |4 ++--
drivers/mmc/host/sdhci.h |2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host
.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c |3 ---
drivers/mmc/host/sdhci-esdhc.h | 29 ++---
2 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci
get is 100Mhz due to pre_div is 2.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index 86fcd5b..c8a773b 100644
The tuning of some platforms may not follow the standard host control
spec v3.0, e.g. Freescale uSDHC on i.MX6Q/DL.
Add a hook here to allow execute platform specific tuning instead of
standard host controller tuning.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci.c
by SW.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc-imx.c | 194 +++-
1 files changed, 193 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 3118a82
This is needed for supporting ultra high speed cards like SD3.0 cards.
Signed-off-by: Dong Aisheng b29...@freescale.com
---
arch/arm/boot/dts/imx6dl.dtsi| 33 ++
arch/arm/boot/dts/imx6q.dtsi | 33 ++
arch/arm
bits)
timing spec:6 (sd uhs SDR104)
signal voltage: 0 (1.80 V)
Signed-off-by: Dong Aisheng b29...@freescale.com
---
drivers/mmc/host/sdhci-esdhc.h |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index
the node to driver, then everything else is driver
specific. Is that reasonable?
Regards
Dong Aisheng
Anyway, these are just some quick thoughts on the topic - obviously more
flesh is needed.
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devicetree-disc
/mxs-auart.c |8
drivers/video/mxsfb.c |9 +
sound/soc/mxs/mxs-saif.c|8
17 files changed, 84 insertions(+), 0 deletions(-)
--
1.7.5.4
Regards
Dong Aisheng
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On Mon, May 07, 2012 at 03:47:00PM +0800, Shawn Guo wrote:
On Mon, May 07, 2012 at 03:14:00PM +0800, Dong Aisheng wrote:
As IMX, basically i'd prefer to add pinctrl states in dts file at the
same time within the patch or using a separate patch to add them before
this series to avoid
On Tue, Mar 20, 2012 at 09:17:48PM +0800, Lothar Waßmann wrote:
Hi,
Dong Aisheng writes:
On Mon, Mar 19, 2012 at 3:02 PM, Grant Likely grant.lik...@secretlab.ca
wrote:
On Mon, 19 Mar 2012 17:49:02 +0100, Lothar Waßmann
l...@karo-electronics.de wrote:
Hi,
Grant Likely
writes:
On Fri, 16 Mar 2012 11:01:35 +0800, Dong Aisheng
aisheng.d...@freescale.com wrote:
On Thu, Mar 15, 2012 at 07:22:04PM +0800, Lothar Waßmann wrote:
Dong Aisheng writes:
On Thu, Mar 15, 2012 at 02:53:29PM +0800, Lothar Waßmann wrote:
Anyway there is no definite
On Fri, Mar 16, 2012 at 03:48:13PM +0800, Lothar Waßmann wrote:
Hi,
Dong Aisheng writes:
On Thu, Mar 15, 2012 at 07:22:04PM +0800, Lothar Waßmann wrote:
[...]
My proposal is only set the fixed part(first two octets) in board dts file,
each board knows it's value, and read the left 4
On Thu, Mar 15, 2012 at 02:53:29PM +0800, Lothar Waßmann wrote:
Hi,
Dong Aisheng writes:
On Wed, Mar 14, 2012 at 10:16:43PM +0800, s.ha...@pengutronix.de wrote:
On Wed, Mar 14, 2012 at 08:45:23PM +0800, Dong Aisheng wrote:
On Wed, Mar 14, 2012 at 01:23:51AM +0800, Grant Likely wrote
On Thu, Mar 15, 2012 at 07:22:04PM +0800, Lothar Waßmann wrote:
Hi,
Dong Aisheng writes:
On Thu, Mar 15, 2012 at 02:53:29PM +0800, Lothar Waßmann wrote:
Hi,
Dong Aisheng writes:
On Wed, Mar 14, 2012 at 10:16:43PM +0800, s.ha...@pengutronix.de wrote:
On Wed, Mar 14, 2012
On Thu, Mar 15, 2012 at 07:24:19PM +0800, s.ha...@pengutronix.de wrote:
On Thu, Mar 15, 2012 at 06:59:28PM +0800, Dong Aisheng wrote:
On Thu, Mar 15, 2012 at 02:53:29PM +0800, Lothar Waßmann wrote:
Hi,
Dong Aisheng writes:
On Wed, Mar 14, 2012 at 10:16:43PM +0800, s.ha
On Tue, Mar 13, 2012 at 09:35:43AM -0500, Rob Herring wrote:
On 03/13/2012 03:47 AM, Dong Aisheng wrote:
From: Dong Aisheng dong.aish...@linaro.org
This patch includes basic dt support which can boot via nfs rootfs.
Signed-off-by: Dong Aisheng dong.aish...@linaro.org
device?
Since our ultimate goal is to convert mach-mxs over to device tree,
I would also suggest we have all the hardware blocks defined in dts
from the beginning.
Also agree.
Will add them all in later patches.
Regards
Dong Aisheng
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