>From 257752f549ec1ffff4029eb1030745b04010029e Mon Sep 17 00:00:00 2001 From: Philip Rakity <prak...@marvell.com> Date: Mon, 20 Dec 2010 21:42:38 -0800 Subject: [PATCH] sdhci: added register defintions for sd host 3.0 HOST CONTROL 2
Signed-off-by: Philip Rakity <prak...@marvell.com> Signed-off-by: Mark F. Brown <ma...@marvell.com> --- drivers/mmc/host/sdhci.h | 17 ++++++++++++++++- 1 files changed, 16 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 91749dc..84292e0 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -145,7 +145,22 @@ #define SDHCI_ACMD12_ERR 0x3C -/* 3E-3F reserved */ +#define HOST_CTRL_2 0x3E +#define SDCTRL_2_UHS_MODE_SEL_SDR12 0x0000 +#define SDCTRL_2_UHS_MODE_SEL_SDR25 0x0001 +#define SDCTRL_2_UHS_MODE_SEL_SDR50 0x0002 +#define SDCTRL_2_UHS_MODE_SEL_SDR104 0x0003 +#define SDCTRL_2_UHS_MODE_SEL_DDR50 0x0004 +#define SDCTRL_2_UHS_MODE_MASK 7 +#define SDCTRL_2_SDH_V18_EN 0x0008 +#define SDCTRL_2_DRV_STRENGTH_SEL_B 0x0000 +#define SDCTRL_2_DRV_STRENGTH_SEL_A 0x0010 +#define SDCTRL_2_DRV_STRENGTH_SEL_C 0x0020 +#define SDCTRL_2_DRV_STRENGTH_SEL_D 0x0030 +#define SDCTRL_2_EXE_TUNING 0x0040 +#define SDCTRL_2_SAMPLING_CLK_SEL 0x0080 +#define SDCTRL_2_ASYNC_INT_EN 0x4000 +#define SDCTRL_2_PRESET_VAL_EN 0x8000 #define SDHCI_CAPABILITIES 0x40 #define SDHCI_TIMEOUT_CLK_MASK 0x0000003F -- 1.6.0.4
0019-sdhci-added-register-defintions-for-sd-host-3.0-HOS.patch
Description: 0019-sdhci-added-register-defintions-for-sd-host-3.0-HOS.patch
