On 26 August 2014 04:50, Barry Song barry.s...@csr.com wrote:
From: Minda Chen minda.c...@csr.com
the implementation of CSR SDHCI controller is a modified version of
the one described in the 1.0 specification, and not a normal 3.0
controller.
and 8bit-width enable bit of CSR MMC hosts is 3,
From: Minda Chen minda.c...@csr.com
the implementation of CSR SDHCI controller is a modified version of
the one described in the 1.0 specification, and not a normal 3.0
controller.
and 8bit-width enable bit of CSR MMC hosts is 3, while stardard hosts
use bit 5.
this patch fixes the functionality
