On Thursday 05 December 2013, Dinh Nguyen wrote:
> Perhaps Seungwon and Chris might have an opinion on this:
>
> From the Synopsys databook for this IP, using the SDMMC_CMD_USE_HOLD_REG
> is not recommended for SDR104, SDR50 and DDR50 speed modes. For other
> speeds, SDR12, and SDR25, it would be
On Thu, 2013-12-05 at 22:08 +0100, Arnd Bergmann wrote:
> On Thursday 05 December 2013, dingu...@altera.com wrote:
> > From: Dinh Nguyen
> >
> > Re-use the "rockchip,rk2928-dw-mshc" binding that will support SD/MMC on
> > Altera's SOCFPGA platform.
> >
> > Signed-off-by: Dinh Nguyen
> > ---
> >
On Thursday 05 December 2013, dingu...@altera.com wrote:
> From: Dinh Nguyen
>
> Re-use the "rockchip,rk2928-dw-mshc" binding that will support SD/MMC on
> Altera's SOCFPGA platform.
>
> Signed-off-by: Dinh Nguyen
> ---
> v3: Re-use "rockchip,rk2928-dw-mshc" binding
> v3: none
> v2: none
> ---
From: Dinh Nguyen
Re-use the "rockchip,rk2928-dw-mshc" binding that will support SD/MMC on
Altera's SOCFPGA platform.
Signed-off-by: Dinh Nguyen
---
v3: Re-use "rockchip,rk2928-dw-mshc" binding
v3: none
v2: none
---
arch/arm/boot/dts/socfpga.dtsi | 11 +++
arch/arm/boot/dts/
