Update OneNAND support for OMAP3.
Signed-off-by: Adrian Hunter [EMAIL PROTECTED]
---
drivers/mtd/onenand/omap2.c | 588 +--
1 files changed, 404 insertions(+), 184 deletions(-)
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index
Add fields wr_access and wr_data_mux_bus.
Signed-off-by: Adrian Hunter [EMAIL PROTECTED]
---
arch/arm/mach-omap2/gpmc.c |5 +
include/asm-arm/arch-omap/gpmc.h |4
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/gpmc.c
Signed-off-by: Adrian Hunter [EMAIL PROTECTED]
---
arch/arm/mach-omap2/board-n800-flash.c | 241 +++-
include/asm-arm/arch-omap/onenand.h|3 +
include/linux/mtd/onenand_regs.h |2 +
3 files changed, 182 insertions(+), 64 deletions(-)
diff --git
Also increase MUSB_LOGLEVEL to 3 in your .config file and reabuild that
2.6.22.18 kernel.
Don't bother re-building the kernel. You could just do an
echo D3 /proc/driver/musb_hdrc
or even D5 for more detail. If low-level debug is not enabled, you can
echo 8
On ti, 2008-08-05 at 13:55 +0300, ext Tony Lindgren wrote:
* Peter 'p2' De Schrijver [EMAIL PROTECTED] [080731 16:39]:
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/smartreflex.c | 60
-
1 files changed, 0
Here is an update for Peter's patch-set implementing the early voltage
controller initialization. Applies over l-o master branch.
Boot tested on sdp board.
Br,
Kalle
On to, 2008-07-31 at 16:37 +0300, ext Peter 'p2' De Schrijver wrote:
This patchset add an early init function to initialize the
From: ext Peter 'p2' De Schrijver [EMAIL PROTECTED]
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
Signed-off-by: Kalle Jokiniemi [EMAIL PROTECTED]
---
arch/arm/mach-omap2/pm34xx.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git
From: ext Peter 'p2' De Schrijver [EMAIL PROTECTED]
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
Signed-off-by: Kalle Jokiniemi [EMAIL PROTECTED]
---
arch/arm/mach-omap2/pm34xx.c | 57 +++
arch/arm/mach-omap2/smartreflex.c | 60
* arun c [EMAIL PROTECTED] [080806 08:15]:
omap2evm LCD supports VGA and QVGA resolution, by default its in VGA mode.
Thanks, pushing today.
Tony
Signed-off-by: Arun C [EMAIL PROTECTED]
---
arch/arm/mach-omap2/board-omap2evm.c | 15 +++-
drivers/video/omap/Makefile |2 +
* Kridner, Jason [EMAIL PROTECTED] [080805 17:12]:
No, ROM CRC is useful for detecting between some device revisions, but not
OMAp3430 vs OMAP3530.
- Original Message -
From: Koen Kooi [EMAIL PROTECTED]
To: linux-omap@vger.kernel.org linux-omap@vger.kernel.org
Cc: Kridner, Jason
On Wed, Aug 06, 2008 at 01:27:40PM +0530, ext Gadiyar, Anand wrote:
Also increase MUSB_LOGLEVEL to 3 in your .config file and reabuild that
2.6.22.18 kernel.
Don't bother re-building the kernel. You could just do an
echo D3 /proc/driver/musb_hdrc
or even D5 for more
On Mon, 2008-08-04 at 17:40 -0600, Paul Walmsley wrote:
Add the MT_MEMORY_STRONGLY_ORDERED memory type for ARM strongly ordered
memory.
This is used on OMAP3 for on-board SRAM. On OMAP, SRAM is used for code
that changes the SDRAM controller's clock, temporarily blocking access to
SDRAM.
Well if there's no way to detect certain omaps during runtime, please patch
arch/arm/plat-omap/common.c to have something like struct omap_globals
omap3503_globals.
There was no need to re-define these structures for the current series of the
OMAP35x processors.
Hence, it was left as it.
On Tue, 2008-08-05 at 07:15 -0500, Woodruff, Richard wrote:
Is the controller allowed to write dirty cache lines out at any time
it
likes? Surely a better fix is to drain the cache of the changes before
changing the clock for the SDRAM?
- Previously the SRAM was marked as cached.
* Premi, Sanjeev [EMAIL PROTECTED] [080806 12:55]:
Well if there's no way to detect certain omaps during runtime, please patch
arch/arm/plat-omap/common.c to have something like struct omap_globals
omap3503_globals.
There was no need to re-define these structures for the current series
On Tue, Aug 05, 2008 at 09:18:14PM +0530, ext Gadiyar, Anand wrote:
If Indexed Mode register accesses are enabled, the ep0_rxstate() function
calls
musb_g_ep0_giveback() before writing to the CSR register. When control returns
to this ep0_rxstate, the index register contents are over-written.
On Wed, Aug 06, 2008 at 01:47:33PM +0300, Felipe Balbi wrote:
Hi, can you mail me (only) this patch as an attachement or put it
somewhere i can download ?
eheh, forget it, did it by hand :-p
--
balbi
--
To unsubscribe from this list: send the line unsubscribe linux-omap in
the body of a
On ti, 2008-08-05 at 13:50 +0300, ext Tony Lindgren wrote:
* Peter 'p2' De Schrijver [EMAIL PROTECTED] [080721 19:03]:
Signed-off-by: Peter 'p2' De Schrijver [EMAIL PROTECTED]
---
arch/arm/mach-omap2/smartreflex.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
Why not use normal uncached memory? Strongly ordered is pretty
inefficient as it cannot do any reordering or write buffer merging
(it's
like having a memory barrier before and after each instruction).
Speculative accesses are not allowed either. Strongly ordered memory
is
not really meant
In omap3 gpios 2-6 are in per domain. Functional clocks for these
should be disabled. This patch is needed until gpio driver disables
gpio clocks.
GPIO modules in PER domain are not able to act as a wake up source if
PER domain is in retention. PER domain sleep transition before MPU is
prevented
From: Tero Kristo [EMAIL PROTECTED]
UART usage (e.g. serial console) now denies sleep for 5 seconds. This
makes it possible to use serial console when dynamic idle is
enabled. Write 1 to /sys/power/clocks_off_while_sleep to enable uart
clock disable on idle. Without this omap won't enter
Kanagesh,
You can give it a shot using a different cable - I have seen similar issues
when using a faulty cable.
Regards,
Pratheesh
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Gupta, Ajay Kumar
Sent: Wednesday, August 06, 2008 6:12 PM
To: kanagesh
Hi,
Re-posting a refreshed version of these patches.
regards
Rajendra
Hi,
I am sending an updated patch set for CPUidle which includes all
fixes/comments
posted on the previous set by Jouni/Richard W/Peter and others.
The Following are the fixes
1) Uart clock enable/disable moved out of
This patches adds handling of PER/NEON and CORE domain in idle.
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/mach-omap2/cpuidle34xx.c | 98 +++---
arch/arm/mach-omap2/cpuidle34xx.h |6 +-
arch/arm/mach-omap2/pm34xx.c | 58
This patch enables the cpuidle option in menuconfig
and selects the menu governor
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/Kconfig| 10 ++
drivers/cpuidle/Kconfig | 26 +-
2 files changed, 31 insertions(+), 5 deletions(-)
Index:
This patch adds some missing sdrc register definitions
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/mach-omap2/sram34xx.S |4 ++--
include/asm-arm/arch-omap/sdrc.h | 13 +++--
2 files changed, 13 insertions(+), 4 deletions(-)
Index:
This patch adds the context save restore functions for GPMC
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/mach-omap2/gpmc.c | 80 +++
include/asm-arm/arch-omap/gpmc.h | 14 ++
2 files changed, 94 insertions(+)
Index:
This patch adds the context save restore functions for UART
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/mach-omap2/serial.c | 62 +++
include/linux/serial_reg.h |1
2 files changed, 63 insertions(+)
Index:
This patch adds the context save restore functions for GPIO
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/plat-omap/gpio.c | 94 +
include/asm-arm/arch-omap/common.h |2
2 files changed, 96 insertions(+)
Index:
This patch does i2c init/re-init for every transfer
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
drivers/i2c/busses/i2c-omap.c |2 ++
1 files changed, 2 insertions(+)
Index: linux-omap-2.6/drivers/i2c/busses/i2c-omap.c
This patch adds the CORE context save/restore routines
- save/restores the following
1) PRCM registers
2) INTC context
3) System Control module context
4) Padconf
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/mach-omap2/cpuidle34xx.c | 612
This patch updates the CPUidle code to handle MPU OFF related C states
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/mach-omap2/cpuidle34xx.c | 19 +++
arch/arm/mach-omap2/cpuidle34xx.h |5 +
2 files changed, 20 insertions(+), 4 deletions(-)
Index:
This patch updates the CPUidle code to handle MPU OFF related C states
Signed-off-by: Rajendra Nayak [EMAIL PROTECTED]
---
arch/arm/mach-omap2/cpuidle34xx.c | 19 +++
arch/arm/mach-omap2/cpuidle34xx.h |5 +
2 files changed, 20 insertions(+), 4 deletions(-)
Index:
CAn anyone tell me howto use the character lcd display on omap 2430
board. i want to test it and use it at assembly level
i am writing it in the memory locations but im not getting any output.
do we have to do any initializations to run this code on the board ?
like mux config ? im creating a bin
On Tue, Aug 5, 2008 at 11:41 PM, Dirk Behme [EMAIL PROTECTED] wrote:
Gadiyar, Anand wrote:
Hi all,
I've pushed all the patches I have in my omap inbox, except for
the omap serial driver that I want to look more.
I've tried to comment on the ones that did not get pushed, then
erased
Hi,
These are the latest set of patches that contain changes to dspbridge code.
They are used to fix some of the warnings and errors reported from various code
check tools, like checkpatch and sparse.
They also remove some code that is now obsolete and try to make bridge code
more
Hi,
This patch replaces bool typedefs with the ones from the kernel, as reported by
checkpatch tool. It should be applied on top of the latest set of cleanup
patches (BRD001 to BRD007) and after Felipe's Kbuild patch (BRD008).
As it is quite big, you can found it at:
Hi,
The following patch fixes warnings present at building stages.
Cleaning up the code to remove minor issues and an unnecessary header file.
Placed under:
http://omapzoom.org/gf/project/omapbridge/frs/?action=FrsReleaseBrowsefrs_package_id=16
Named: BRD010-ARM-OMAP-cleanup_warnings.patch
-
On an omap3evm with the defconfig, the kernel is failing to identify a
jffs2 filesystem. It's booting from NFS just fine.
I had built the latest code checked into linux-omap last week - file
system booting had been working, IIRC. Loading TI reference 2.6.22
kernel finds the file system
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