On Tuesday 26 May 2009 16:17:23 ext Janusz Krzysztofik wrote:
> Hi,
>
> I am trying to add sound support for ams-delta omap machine, yet without
> much success.
>
> Three years ago, Mark Underwood created an omap-alsa compatible driver
> that basically worked[1]. It was derieved from similiar drive
Hi,
We're trying to get basic USB host mode up and running on a OMAP3530
EVM, with no success. We're (now, after many permutations of kernels
and .config settings) using the vanilla 2.6.29-omap1 kernel plus the
AUTOIDLE fix from Niilo Minkkinen), with slight additions to
board-omap3evm to al
* Tony Lindgren [090522 15:37]:
> Hi all,
>
> Here are mostly omap3 specific updates for the coming merge window
> for review. Still to come few more boards and regulator framework
> changes for omap3 in one more series.
I've merged these into omap for-next branch.
> Regards,
>
> Tony
>
> --
* Tony Lindgren [090519 16:31]:
> Hi all,
>
> This series contains omap updates for review. There will be one more
> series after this for omap3 specific patches.
I've merged these into omap for-next branch.
> Regards,
>
> Tony
>
> ---
>
> Eero Nurkkala (1):
> ARM: OMAP: McBSP: Fix le
* Kevin Hilman [090520 16:20]:
> This series is intended to push the core PM support from linux-omap
> into mainline.
>
> Upon review/acceptance, Tony will merge into his for-next branch for
> the next merge window so all OMAP stuff can come from one place.
>
> In addition to the linux-omap PM
Hi,
I'd like to add support for lcd backlight on/off switching on omap1 ams-delta
board. I could potentially use omap1_bl backlight class device driver for
this purpose, but it is not fully compatible with ams-delta, as it actually
changes lcd contrast instead of backlight intensity on this boa
Convert omap3_sram_configure_core_dpll() to use macros rather than
magic numbers.
Signed-off-by: Paul Walmsley
---
arch/arm/mach-omap2/sram34xx.S | 53 +---
1 files changed, 38 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arc
GPIO de-bounce clocks don't have any impact on the module idle state, so
the clock code should not wait for the module to enable after the de-bounce
clocks are enabled.
Problem found by Kevin Hilman .
Signed-off-by: Paul Walmsley
Signed-off-by: Kevin Hilman
---
arch/arm/mach-omap2/clock34xx.h
From: Roel Kluin
with while (i++ < MAX_CLOCK_ENABLE_WAIT); i can reach MAX_CLOCK_ENABLE_WAIT + 1
after the loop, so if (i == MAX_CLOCK_ENABLE_WAIT) that's still success.
Signed-off-by: Roel Kluin
Signed-off-by: Paul Walmsley
---
arch/arm/mach-omap2/clock.c |2 +-
arch/arm/mach-omap2
From: Tero Kristo
Previously only 1 and 2 was supported. This is needed for DVFS VDD2 control.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/clock34xx.c|9 +++--
arch/arm/mach-omap2/sram34xx.S |8 +---
arch/arm/plat-omap/include/mach/sram.h |6 --
a
Correspondence with the TI OMAP hardware team indicates that
SDRC_DLLA_CTRL.FIXEDDELAY should be initialized to 0x0f. This number
was apparently derived from process validation. This is only used
when the SDRC DLL is unlocked (e.g., SDRC clock frequency less than
83MHz).
Signed-off-by: Paul Walm
Clean up comments and copyrights on the CORE DPLL3 M2 divider change code.
Signed-off-by: Paul Walmsley
---
arch/arm/mach-omap2/sram34xx.S | 45 +---
1 files changed, 24 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/m
Program the SDRC_MR_0 register as well during SDRC clock changes.
This register allows selection of the memory CAS latency. Some SDRAM
chips, such as the Qimonda HYB18M512160AF6, have a lower CAS latency
at lower clock rates.
Signed-off-by: Paul Walmsley
---
arch/arm/mach-omap2/clock34xx.c
When changing the SDRAM clock from 166MHz to 83MHz via the CORE DPLL M2
divider, add a short delay before returning to SDRAM to allow the SDRC
time to stabilize. Without this delay, the system is prone to random
panics upon re-entering SDRAM.
This time delay varies based on MPU frequency. At 500
On the OMAP3, initialize SDRC timings when the kernel boots. This ensures
that the kernel is running with known, optimized SDRC timings, rather than
whatever was configured by the bootloader.
Signed-off-by: Paul Walmsley
---
arch/arm/mach-omap2/clock34xx.c |3 ---
arch/arm/mach-omap2/io.c
The original CDP kernel that this code comes from waited for 0x800
loops after switching the CORE DPLL M2 divider. This does not appear
to be necessary.
Signed-off-by: Paul Walmsley
---
arch/arm/mach-omap2/sram34xx.S |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/arc
Hello Russell,
here is the next set of OMAP clock patches for review for the
post-2.6.30 merge window. They apply on top of the previous set
("OMAP clock/SDRC patches on v2.6.30-rc5"). If you're happy with
these patches, Tony will queue them up into his for-next branch.
This series completes ba
* Paul Walmsley [090526 09:53]:
> On Tue, 26 May 2009, Russell King - ARM Linux wrote:
>
> > On Tue, May 26, 2009 at 10:29:52AM -0600, Paul Walmsley wrote:
> > > Hello Russell,
> > >
> > > On Tue, 12 May 2009, Paul Walmsley wrote:
> > >
> > > > This series contains OMAP clock and SDRAM controll
On May 20, 2009, at 1:55 PM, Kevin Hilman wrote:
Kevin Hilman writes:
Blazej Kot writes:
I have been working with the linux-pm kernel on the Gumstix Overo,
seeing how low it's power consumption can go, both during the cpu
"on"
and especially while the CPU is suspended. Thus far, I've h
Hi,
This trivial patch adds gpio-keys compatible platform device definition to
ams-delta board, that supports hook switch found on this videophone. It is
derived from similiar definitions found in other boards code. The patch is
based on linux-2.6.30-rc5. Any comments are welcome.
Cheers,
Janu
On Tue, 26 May 2009, Russell King - ARM Linux wrote:
> On Tue, May 26, 2009 at 10:29:52AM -0600, Paul Walmsley wrote:
> > Hello Russell,
> >
> > On Tue, 12 May 2009, Paul Walmsley wrote:
> >
> > > This series contains OMAP clock and SDRAM controller patches against
> > > v2.6.30-rc5. If you are
On Tue, May 26, 2009 at 10:29:52AM -0600, Paul Walmsley wrote:
> Hello Russell,
>
> On Tue, 12 May 2009, Paul Walmsley wrote:
>
> > This series contains OMAP clock and SDRAM controller patches against
> > v2.6.30-rc5. If you are happy with these, Tony will merge them into
> > his for-next branch
Hello Russell,
On Tue, 12 May 2009, Paul Walmsley wrote:
> This series contains OMAP clock and SDRAM controller patches against
> v2.6.30-rc5. If you are happy with these, Tony will merge them into
> his for-next branch for you to pull.
>
> This series includes the clk_init_one() to clk_preinit
Tony, Any update on this patch.
Thanks
Hemanth
> This patch adds support for McSPI slave and FIFO. DMA and FIFO
> could be enabled together for better throughput. Platform config
> parameters have been added to enable these features on any particular
> McSPI controller.
>
> FIFO can be enabled by
Hi Paul, Kevin,
Here is a patch for the SDRC 2nd CS support. It applies on top of the current
pm branch.
I have some questions:
- Is it OK to copy the micron sdram params file to a new file with the 2 CSes
params? One could use a unique file with #ifdef SDRC_SUPPORT_2_CSES.
- Does the RX51 boar
Hi,
I am trying to add sound support for ams-delta omap machine, yet without
much success.
Three years ago, Mark Underwood created an omap-alsa compatible driver
that basically worked[1]. It was derieved from similiar driver for aic23
codec found on omap osk machine. It looks like Mark has n
On Mon, May 25, 2009 at 07:47:30PM -0300, Daniel Ribeiro wrote:
> This hack would look less ugly on twl4030reg_probe(). There you can
> disable the regulator without first enabling it.
That might cause issues when running on a platform where someone has
used the MMC regulators for some purpose ot
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