OMAP3430/3630 has a Silicon bug because of which SDRC is released from
IDLE even before Core DPLL has locked. This leads to undefined behaviour
of SDRC DLL. This patch has workaround for the same.
Description of WA for 3430:
Initialization:
Disable DPLL3 automatic mode by default. Issue
Fix for TWL5030 Silicon Errata 27 & 28:
27 - VDD1, VDD2, may have glitches when their output value is updated.
28 - VDD1 and / or VDD2 DCDC clock may stop working when internal clock
is switched from internal to external.
Workaround requires the TWL DCDCs to use HFCLKI
Updated subject line with patch version (v2).
> -Original Message-
> From: Lesly A M [mailto:lesl...@ti.com]
> Sent: Friday, April 09, 2010 4:03 PM
> To: linux-omap@vger.kernel.org
> Cc: Lesly A M; Nishanth Menon; David Derrick; Samuel Ortiz
> Subject: [PATCH] MFD: TWL4030: changes for TRI
On Thu, Apr 08, 2010 at 07:27:15PM +0100, Russell King - ARM Linux wrote:
> On Thu, Apr 08, 2010 at 09:02:56PM +0530, Rabin Vincent wrote:
> > On Thu, Mar 25, 2010 at 11:32:48PM +, Russell King - ARM Linux wrote:
> > > The patch below is the combined patch; individual patches can be found
> > >
On Wed, Mar 31, 2010 at 02:43:13PM +0800, Jeremy Kerr wrote:
> Hi Russell,
>
> > LMB... logical memory blocks.
>
> Nice, will be good for the DT work too.
>
> > @@ -483,6 +484,13 @@ static void __init build_mem_type_table(void)
> >
> > #define vectors_base() (vectors_high() ? 0x :
Hello Kan-Ru,
On 04/07/10 08:34, Kan-Ru Chen wrote:
> This patch corrects the DVI-D output setup of Devkit8000
>
> Devkit8000 has different DVI reset pin with the BeagleBoard. On Devkit8000
> the TWL4030 GPIO_7 is assigned to do the job.
>
> Signed-off-by: Kan-Ru Chen
> ---
> arch/arm/mach-oma
Hello Kan-Ru,
On 04/07/10 08:34, Kan-Ru Chen wrote:
> This patch corrects the LCD reset pin config
>
> Original code from early devkit8000 patch sets the TWL4030 GPIO_1
> to EHCI_nOC and TWL4030_GPIO_MAX+1 to ledA. Indeed these two pins
> are both LCD_PWREN. Setup the lcd reset_gpio properly so i
Hello all,
I've got a custom OMAP3503 board with 256Mbytes of LPDDR memory
(single die, x32-bit) that i've got working with x-loader and u-
boot. However, when i load the Linux kernel (2.6.32 git), it randomly produces
the following errors:
1) Hangs midway through the "Uncompressin
Menon, Nishanth had written, on 04/08/2010 12:54 PM, the following:
From: Deepak K
[...]
Cc: Govindraj R
Cc: Kevin Hilman
Cc: Tero Kristo
Signed-off-by: Deepak K
Signed-off-by: Nishanth Menon
---
Note: original patch was done for android kernel, ported and sanity
tested
arch/arm/mach-
Hi Nishanth
My comments below.
Regards
Deepak
-Original Message-
From: Menon, Nishanth
Sent: Friday, April 09, 2010 12:00 PM
To: linux-omap
Cc: Kattungal, Deepak; Raja, Govindraj; Kevin Hilman; Tero Kristo
Subject: Re: [PM][PATCH 2/4] OMAP3: Serial: Errata i202: fix for MDR1 access
Men
Kattungal, Deepak had written, on 04/09/2010 12:06 PM, the following:
[..]
+ /* TX and RX FIFO Clear; FIFO dis */
+ serial_write_reg(p, UART_FCR, 0xA6);
NAK
Late realization: should be checking if FIFO clear actually occurred
before proceeding (FIFO clear bits will be cleared by h/w
From: Deepak K
Original patch:
http://git.omapzoom.org/?p=kernel/omap.git;a=commitdiff;h=42d4a342c009bd9727c100abc8a4bc3063c22f0c
Errata i202 (OMAP3430 - 1.12, OMAP3630 - 1.6):
UART module MDR1 register access can cause a dummy underrun
condition which could result in a freeze in the case of IrD
On Fri, Apr 09, 2010 at 12:11:05PM +0100, Russell King - ARM Linux wrote:
> Here's a revised version which should resolve the initrd problem.
It does, after the missing call to lmb_init() is added.
Rabin
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