Hi,
On Thu, 2011-03-03 at 17:46 -0600, Steve Sakoman wrote:
> This patch adds support for the Gumstix Palo35 expansion board
> which utilizes the 320 x 240 pixel LG.Philips LB035Q02 LCD Panel
>
> Signed-off-by: Steve Sakoman
This looks about as good as the other panel drivers. Which means it
wo
Adding board file structure for display which adds the display
structure with HDMI as the default driver when the display init
is called.
HDMI GPIO configurations are also done in this file.
Signed-off-by: Mythri P K
---
arch/arm/mach-omap2/board-omap4panda.c | 74
calling the platform registration of HDMI driver from core during
initialization.
Signed-off-by: Mythri P K
---
drivers/video/omap2/dss/core.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c
index 3c
Adding board file structure for display which adds the display
structure with HDMI as the default driver when the display init
is called.
HDMI GPIO configurations are also done in this file.
Signed-off-by: Mythri P K
---
arch/arm/mach-omap2/board-4430sdp.c | 75 +++
Adding the hdmi interface driver header file (hdmi.h) to the dss driver.
Register and timing declaration to be used by the corresponding c file
is added in this file.
Signed-off-by: Mythri P K
---
drivers/video/omap2/dss/Kconfig |8 +
drivers/video/omap2/dss/Makefile |1 +
drivers/vid
The panel driver(hdmi_omap4_panel.c) in omap2/dss acts as a controller
to manage the enable and disable requests and synchronize audio and video.
Signed-off-by: Mythri P K
---
drivers/video/omap2/dss/Kconfig|8 +
drivers/video/omap2/dss/Makefile |1 +
drivers/video/
Adding the hdmi interface driver header file (hdmi.h) to the dss driver.
Register and timing declaration to be used by the corresponding c file
is added in this file.
Signed-off-by: Mythri P K
---
drivers/video/omap2/dss/hdmi.h | 444
1 files changed, 44
Adding changes to set gamma table bit for TV interface to make sure it is
disabled
.
Signed-off-by: Mythri P K
---
drivers/video/omap2/dss/dispc.c | 10 ++
drivers/video/omap2/dss/dss.h |1 +
2 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/video/omap2/dss
Signed-off-by: Mythri P K
---
drivers/video/omap2/dss/dss.c |5 +
drivers/video/omap2/dss/dss.h |7 ++-
2 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 99de4e1..baf1974 100644
--- a/drivers/video/
Adding HDMI type in dss_features , overlay and
the manager so that HDMI type of display will be recognized.
Signed-off-by: Mythri P K
---
arch/arm/plat-omap/include/plat/display.h |1 +
drivers/video/omap2/dss/display.c |5 +
drivers/video/omap2/dss/dss_features.c|2 +
Adding HDMI support on OMAP4.
HDMI is a driver that is similar to the VENC or the DSI driver to support
HDMI/DVI sink device.
The current design adheres to the DSS2 architecture.
It is split into the HDMI DSS driver and HDMI panel driver.
HDMI DSS driver (hdmi.c) is responsible for
1.OMAP relat
Hi Michael,
Michael Jones wrote:
> On 03/02/2011 08:18 PM, Laurent Pinchart wrote:
>> Hi Michael,
>>
>> On Tuesday 01 March 2011 17:41:01 Michael Jones wrote:
>>> Hi all,
>>>
>>> I get a warning about a cache error with the following steps:
>>>
>>> 0. load omap3-isp
>>> 1. set up media broken medi
> -Original Message-
> From: Hilman, Kevin
> Sent: Friday, March 04, 2011 6:56 AM
> To: DebBarma, Tarun Kanti
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH v11 6/8] dmtimer: switch-over to platform device
> driver
>
> Tarun Kanti DebBarma writes:
>
> > switch-over to platform de
> -Original Message-
> From: Hilman, Kevin
> Sent: Friday, March 04, 2011 6:59 AM
> To: DebBarma, Tarun Kanti
> Cc: linux-omap@vger.kernel.org; Gopinath, Thara
> Subject: Re: [PATCH v11 5/8] OMAP: dmtimer: platform driver
>
> Tarun Kanti DebBarma writes:
>
> > From: Thara Gopinath
> >
>
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 6:53 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 0/6] omap3: pm: Fixes for low power code
>
> Hi Santosh,
>
> Santos
> -Original Message-
> From: Hilman, Kevin
> Sent: Friday, March 04, 2011 6:32 AM
> To: DebBarma, Tarun Kanti
> Cc: linux-omap@vger.kernel.org; Gopinath, Thara
> Subject: Re: [PATCH v11 4/8] OMAP2+: dmtimer: convert to platform devices
>
> Tarun Kanti DebBarma writes:
>
> > Add routines
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 10:36 PM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 12/17] omap4: pm-debug: Add wakeup timer and
> debug counters
>
>
On Thu, Mar 3, 2011 at 10:38 AM, Sricharan R wrote:
> Hi,
>>-Original Message-
>>From: Govindraj [mailto:govindraj...@gmail.com]
>>Sent: Wednesday, March 02, 2011 3:37 PM
>>To: Sricharan R
>>Cc: Govindraj.R; linux-omap@vger.kernel.org;
> linux-ser...@vger.kernel.org;
>>linux-arm-ker...@lis
> -Original Message-
> From: Tony Lindgren [mailto:t...@atomide.com]
> Sent: Friday, March 04, 2011 12:01 AM
> To: Santosh Shilimkar
> Cc: Benoit Cousson; linux-omap@vger.kernel.org; Felipe Balbi;
> Sricharan R
> Subject: Re: [PATCH 5/6] omap4: Initialise the l3 device with the
> hwmod data
> -Original Message-
> From: tom.leim...@gmail.com [mailto:tom.leim...@gmail.com]
> Sent: Thursday, March 03, 2011 4:24 PM
> To: li...@arm.linux.org.uk
> Cc: linux-arm-ker...@lists.infradead.org; will.dea...@arm.com; Ming
> Lei; Santosh Shilimkar; Woodruff Richard; Tony Lindgren; linux-
> o
According to the hwmod interface data, the DSS submodule "VENC" uses a
clock, "dss_54m_fck"/"dss_tv_fck", which the PRCM cannot autoidle. By
default, the hwmod code assumes that interface clocks can be autoidled
by the PRCM. When the interface clock can't be autoidled by the PRCM,
those interfac
> -Original Message-
> From: Hilman, Kevin
> Sent: Friday, March 04, 2011 5:54 AM
> To: DebBarma, Tarun Kanti
> Cc: linux-omap@vger.kernel.org
> Subject: Re: [PATCH v11 2/8] OMAP4: hwmod data: add dmtimer version
> information
>
> Tarun Kanti DebBarma writes:
>
> > OMAP4 has two groups o
Hi,
On Tue, Mar 1, 2011 at 11:00 PM, Turquette, Mike wrote:
> On Mon, Feb 28, 2011 at 3:35 AM, Gulati, Shweta wrote:
>> Hi,
>>
>> On Tue, Feb 22, 2011 at 1:17 AM, Turquette, Mike wrote:
>>> On Mon, Feb 21, 2011 at 4:31 AM, Gulati, Shweta
>>> wrote:
Hi,
On Fri, Feb 18, 2011 at 2
On Thu, Mar 03, 2011 at 10:35:23AM -0800, Kevin Hilman wrote:
> "G, Manjunath Kondaiah" writes:
>
> > This patch series is remaining part of dma hwmod to support pm runtime
> > and for handling mstandby mode for all applicable DMA mstandby mode errata.
>
> This is still not runtime-suspending w
Hi,
Sorry for the delay on replying to this one, some comments below.
* sricharan [110301 10:13]:
> --- a/arch/arm/mach-omap2/mux.c
> +++ b/arch/arm/mach-omap2/mux.c
> @@ -352,15 +352,12 @@ err1:
> void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
> {
> int i;
> -
> /
On Fri, 2011-02-11 at 20:42 +0530, Santosh Shilimkar wrote:
> Add a description field to each idle C-state. This helps to give
> better data with PowerTop and one don't have to refer to the code
> to link what Cx means from system point of view while analysing
> PowerTop data.
>
> No functional ch
Tarun Kanti DebBarma writes:
> From: Thara Gopinath
>
> Add dmtimer platform driver functions which include:
> (1) platform driver initialization
> (2) driver probe function
> (3) driver remove function
>
> Signed-off-by: Tarun Kanti DebBarma
> Signed-off-by: Thara Gopinath
> Acked-by: Cousson
From: Vishwanath BS
Since all voltage data is now centralized in oppxxx_data.c, we can remove
the replace the values in the opp table with the macros used for voltage
values. This will avoid opp table and voltage layer having conflicting
values.
Signed-off-by: Vishwanath BS
---
This patch has
Tarun Kanti DebBarma writes:
> switch-over to platform device driver through following changes:
> (a) initiate dmtimer early initialization from omap2_gp_timer_init()
> in timer-gp.c. This is equivalent of timer_init()->timer->init().
> (b) modify plat-omap/dmtimer routines to use new register ma
Tarun Kanti DebBarma writes:
> Add pm_runtime support to dmtimer. Since dmtimer is used during
> early boot before pm_runtime is initialized completely there are
> provisions to enable/disable clocks directly in the code during
> early boot.
I'm still not crazy about the duplicate logic (both ea
Tarun Kanti DebBarma writes:
> Add routines to converts dmtimers to platform devices. The device data
> is obtained from hwmod database of respective platform and is registered
> to device model after successful binding to driver. It also provides
> provision to access timers during early boot wh
Tarun Kanti DebBarma writes:
> From: Thara Gopinath
>
> Add dmtimer platform driver functions which include:
> (1) platform driver initialization
> (2) driver probe function
> (3) driver remove function
>
> Signed-off-by: Tarun Kanti DebBarma
> Signed-off-by: Thara Gopinath
> Acked-by: Cousson
Tarun Kanti DebBarma writes:
> OMAP4 has two groups of timers: version 1 timers are 1, 2, 10,
> while the rest of the timers, 3-9, 11 are version 2 timers.
> The version information is required by the driver so that they
> could be handled correctly by it.
>
> Signed-off-by: Tarun Kanti DebBarma
On Thu, 3 Mar 2011, Paul Walmsley wrote:
> On Fri, 25 Feb 2011, Cousson, Benoit wrote:
>
> > static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
> > &omap3xxx_l3_main__l4_core,
> > - &omap3_l4_core__sr1,
> > - &omap3_l4_core__sr2,
Never mind, I see the issue now...
- Paul
-
Hi Tero,
On Fri, 2011-01-21 at 12:37 +0200, Tero Kristo wrote:
> On OMAP3 SoCs, if the CORE powerdomain enters off-mode, many other
> parts of the chip will be reset. If those parts of the chip are busy,
> the reset will disrupt them, causing unpredictable and generally
> undesirable results. Thi
This patch adds DSS2 support for DVI, S-video, the 480x272 Samsung
LTE430WQ-F0C panel, and the 320x240 LG.Philips LB035Q02 panel.
Signed-off-by: Steve Sakoman
---
arch/arm/mach-omap2/board-overo.c | 239 +++--
1 files changed, 202 insertions(+), 37 deletions(-)
This patch adds support for the Gumstix Palo35 expansion board
which utilizes the 320 x 240 pixel LG.Philips LB035Q02 LCD Panel
Signed-off-by: Steve Sakoman
---
drivers/video/omap2/displays/Kconfig |6 +
drivers/video/omap2/displays/Makefile |1 +
.../omap2/dis
This patch series adds support for the set of display devices available
for the Overo COM products: DVI, S-Video, the Samsung LTE430WQ-F0C LCD
panel, and the LG.Philips LB035Q02 panel.
Tested with applicable expansion boards for each option: Tobi, Palo43,
Chestnut43, and Palo35.
Steve Sakoman (2)
Paul Walmsley writes:
> From: Tero Kristo
>
> Prevent the CORE power domain from entering RETENTION or OFF when DSS
> is on. Otherwise, the display FIFO(s) may underflow due to the time
> needed for the CORE to wake back up, causing tearing and unnecessary
> interrupts.
>
> Signed-off-by: Tero
Hi Benoît,
one question about this.
On Fri, 25 Feb 2011, Cousson, Benoit wrote:
> From 09506eedef901af0fa19ddb48f486ce4ef353645 Mon Sep 17 00:00:00 2001
> From: Benoit Cousson
> Date: Fri, 25 Feb 2011 17:46:33 +0100
> Subject: [PATCH] OMAP3: hwmod data: Remove masters port links for
> interconn
To summarize my comments on your series.
On 3/3/2011 2:50 PM, Andy Green wrote:
The following series fixes two issues with OMAP 3 and 4 i2c support.
First, hwmod tables don't have the i2c units marked up as being
for 16-bit access only, which is mandatory.
That part is OK, and should just be
On 3/3/2011 2:50 PM, Andy Green wrote:
The driver makes the choice about which register layout to
use based on cpu, however it then tries to use the probed
peripheral unit version register to decide whether to access
registers that only exist in the 4430 unit.
Unfortunately, the unit with the sm
On 3/3/2011 2:50 PM, Andy Green wrote:
The OMAP I2C driver dynamically chooses between two register sets of
differing sizes depending on the cpu type it finds itself on.
It has been observed that the existing code references non-existing
registers on OMAP3530, because while it correctly chose th
On Thu, 24 Feb 2011, Avinash.H.M wrote:
> Some of the omap2, omap3 peripherals support software reset. This
> can be done through the softreset bit in sysconfig register.
> The reset status can be checked through resetdone bit of
> sysstatus register. syss_has_reset_status is added to the hwmod
>
On 3/3/2011 2:50 PM, Andy Green wrote:
Describe why we can't simply probe the peripheral unit ID
to make the decision about what register map to use
Cc: patc...@linaro.org
Signed-off-by: Andy Green
---
drivers/i2c/busses/i2c-omap.c | 11 +++
1 files changed, 11 insertions(+), 0 del
On 3/3/2011 6:56 PM, Andy Green wrote:
On 03/03/2011 05:42 PM, Somebody in the thread at some point said:
On 3/3/2011 2:50 PM, Andy Green wrote:
Hi -
Thanks for the reply.
Peter Maydell noticed when running under QEMU he was getting
errors reporting 32-bit access to I2C peripheral unit regi
"G, Manjunath Kondaiah" writes:
> This patch series is remaining part of dma hwmod to support pm runtime
> and for handling mstandby mode for all applicable DMA mstandby mode errata.
This is still not runtime-suspending when I use my DMA test in linking
mode.
If I put a large enough period bet
* Santosh Shilimkar [110221 11:01]:
> > -Original Message-
> > From: Cousson, Benoit [mailto:b-cous...@ti.com]
> > Sent: Monday, February 21, 2011 11:41 PM
> > To: Shilimkar, Santosh
> > Cc: linux-omap@vger.kernel.org; Balbi, Felipe; R, Sricharan
> > Subject: Re: [PATCH 5/6] omap4: Initial
Hello Tarun,
On Tue, 4 Jan 2011, Tarun Kanti DebBarma wrote:
> Autoidle is a single bit, TIOCP_CFG[0], setting on OMAP1/2/3/4 platforms.
> In _set_module_autoidle() I am seeing 0x3 value where the mask is computed.
> This should be 0x1.
>
> v2:
> (1) Modified the subject.
> (2) Modified the desc
* tom.leim...@gmail.com [110303 02:52]:
> From: Ming Lei
>
> This patch supports pmu irq routed from CTI, so
> make pmu/perf working on OMAP4.
>
> The idea is from Woodruff Richard in the disscussion
> about "Oprofile on Pandaboard / Omap4" on pandabo...@googlegroups.com.
>
> Cc: Santosh Shili
On 03/03/2011 05:42 PM, Somebody in the thread at some point said:
On 3/3/2011 2:50 PM, Andy Green wrote:
Hi -
Thanks for the reply.
Peter Maydell noticed when running under QEMU he was getting
errors reporting 32-bit access to I2C peripheral unit registers
that are documented to be 8 or 16-
On 3/3/2011 2:50 PM, Andy Green wrote:
Peter Maydell noticed when running under QEMU he was getting
errors reporting 32-bit access to I2C peripheral unit registers
that are documented to be 8 or 16-bit only[1][2]
Well, in that case, it is more a QEMU bug since the HW is working fine
with 32 bi
On Thu, Mar 03, 2011 at 08:02:09AM -0800, Greg KH wrote:
> On Thu, Mar 03, 2011 at 10:48:29AM +0200, Felipe Balbi wrote:
> > On Wed, Mar 02, 2011 at 04:57:55PM +1100, Stephen Rothwell wrote:
> > > Hi Greg,
> > >
> > > Today's linux-next merge of the usb tree got a conflict in
> > > arch/arm/mach-o
Santosh Shilimkar writes:
>> -Original Message-
>> From: Kevin Hilman [mailto:khil...@ti.com]
>> Sent: Thursday, March 03, 2011 4:21 AM
>> To: Santosh Shilimkar
>> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
>> Subject: Re: [PATCH 12/17] omap4: pm-debug: Add wakeu
Santosh Shilimkar writes:
>> -Original Message-
>> From: Kevin Hilman [mailto:khil...@ti.com]
>> Sent: Thursday, March 03, 2011 4:00 AM
>> To: Santosh Shilimkar
>> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
>> Subject: Re: [PATCH 08/17] omap4: pm: Add GIC save/re
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 4:21 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 12/17] omap4: pm-debug: Add wakeup timer and
> debug counters
>
> S
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 4:16 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 11/17] omap4: suspend: Add MPUSS RET and OFF
> support
>
> Santosh
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 4:06 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 10/17] omap4: pm: Add L2 cache lowpower support
>
> Santosh Shilimk
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 4:00 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 08/17] omap4: pm: Add GIC save/restore support
[...]
> > @@ -67,6
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 3:54 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 07/17] omap4: pm: CPU1 wakeup workaround form
> Low power modes
>
>
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 3:48 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org; Rajendra Nayak
> Subject: Re: [PATCH 05/17] omap4: pm: Initialise all the
> clockdoma
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 3:43 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 04/17] omap4: pm: Add CPUx OFF mode support
>
> Santosh Shilimkar
On Thu, 2011-03-03 at 09:27 -0600, Murthy, Raghuveer wrote:
> OMAP4 has 2 LCD channels and corresponding DISPC_DIVISOR1 and DISPC_DIVISOR2
> registers to configure the pixel clock frequency, for the respective LCD
> displays.
>
> There is also DISPC_DIVISOR register, which by default has the ENABL
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 3:29 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 03/17] omap4: Export scu base address
>
> Santosh Shilimkar writes
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 3:27 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 02/17] omap4: pm: Add SAR RAM support
>
[..]
> > +
> > + /* Stat
On 03/02/2011 08:18 PM, Laurent Pinchart wrote:
> Hi Michael,
>
> On Tuesday 01 March 2011 17:41:01 Michael Jones wrote:
>> Hi all,
>>
>> I get a warning about a cache error with the following steps:
>>
>> 0. load omap3-isp
>> 1. set up media broken media pipeline. (e.g. set different formats on
>
On Thu, Mar 03, 2011 at 10:48:29AM +0200, Felipe Balbi wrote:
> On Wed, Mar 02, 2011 at 04:57:55PM +1100, Stephen Rothwell wrote:
> > Hi Greg,
> >
> > Today's linux-next merge of the usb tree got a conflict in
> > arch/arm/mach-omap2/board-4430sdp.c between commit
> > 1dbea0f5e23b6c647db72fa4a048c
> -Original Message-
> From: Kevin Hilman [mailto:khil...@ti.com]
> Sent: Thursday, March 03, 2011 3:17 AM
> To: Santosh Shilimkar
> Cc: linux-omap@vger.kernel.org; linux-arm-ker...@lists.infradead.org
> Subject: Re: [PATCH 01/17] omap4: pm: Add omap WakeupGen module
> support
>
[...]
> > +
On Thursday 03 March 2011 06:46 PM, Valkeinen, Tomi wrote:
On Thu, 2011-03-03 at 15:25 +0530, Raghuveer Murthy wrote:
OMAP4 has 2 LCD channels and corresponding DISPC_DIVISOR1 and DISPC_DIVISOR2
registers to configure the pixel clock frequency, for the respective LCD
displays.
There is also DIS
The OMAP4 DISPC_DIVISOR1 is backward compatible to OMAP3xxx DISPC_DIVISOR.
However DISPC_DIVISOR is also provided in OMAP4, to control DISPC_CORE_CLK
independent of Primary and Secondary display clocks.
Renamed DISPC_DIVISOR(ch) to DISPC_DIVISORo(ch), to facilitate introduction
of DISPC_DIVISOR re
Using dss_features to select independent core clock divider and setting
it. Added the register used, to DISPC context save and restore group
---
In OMAP4, the minimum DISPC_CORE_CLK required can be expressed as:
DISPC_COR
In OMAP3xxx DISPC_DIVISOR register has a logical clock divisor (lcd_div)
field. The lcd_div is common, for deciding the DISPC core functional clock
frequency, and the final pixel clock frequency for LCD display.
In OMAP4, there are 2 LCD channels, hence two divisor registers, DISPC_DIVISOR1
and DI
OMAP4 has 2 LCD channels and corresponding DISPC_DIVISOR1 and DISPC_DIVISOR2
registers to configure the pixel clock frequency, for the respective LCD
displays.
There is also DISPC_DIVISOR register, which by default has the ENABLE bit
set to zero, for backward compatibility mode. Hence the logical
>> > > > in ES1, timeouts were observed only with RTC.
>> > > > I2C burst access to IRQ registers and bq24156 were OK
>> > >
>> > > Was an errata generated for this bug?
>> >
>> > er, erratum, pardon me...
>>
>> Is an erratum present for this bug?
>>
>> Also, will you generate a patch for this to a
Gulati, Shweta wrote, on 03/03/2011 07:37 PM:
Hi,
On Thu, Mar 3, 2011 at 3:53 PM, Menon, Nishanth wrote:
On Thu, Mar 3, 2011 at 15:39, Gulati, Shweta wrote:
Hi,
On Thu, Mar 3, 2011 at 3:04 PM, Menon, Nishanth wrote:
On Thu, Mar 3, 2011 at 14:57, Shweta Gulati wrote:
This Patch adds OPP
On Thu, 2011-03-03 at 16:27 +0200, Felipe Balbi wrote:
> On Thu, Mar 03, 2011 at 03:21:29PM +0100, Michael Büsch wrote:
> > On Thu, 2011-03-03 at 11:43 +0200, Felipe Balbi wrote:
> > > On Wed, Mar 02, 2011 at 05:11:53PM +0100, Michael Buesch wrote:
> > > > An unsigned int pointer must not be cast
On Thu, Mar 03, 2011 at 03:18:13PM +0100, Michael Büsch wrote:
> On Thu, 2011-03-03 at 11:42 +0200, Felipe Balbi wrote:
> > On Wed, Mar 02, 2011 at 05:11:58PM +0100, Michael Buesch wrote:
> > > @@ -175,9 +124,9 @@ static int retu_wdt_release(struct inode
> > > struct retu_wdt_dev *wdev = file->p
On Thu, Mar 03, 2011 at 03:21:29PM +0100, Michael Büsch wrote:
> On Thu, 2011-03-03 at 11:43 +0200, Felipe Balbi wrote:
> > On Wed, Mar 02, 2011 at 05:11:53PM +0100, Michael Buesch wrote:
> > > An unsigned int pointer must not be casted to an unsigned
> > > long pointer before use. Convert the bit
On Thu, 2011-03-03 at 11:43 +0200, Felipe Balbi wrote:
> On Wed, Mar 02, 2011 at 05:11:53PM +0100, Michael Buesch wrote:
> > An unsigned int pointer must not be casted to an unsigned
> > long pointer before use. Convert the bitfield to unsigned long
> > to fix this.
> > Also use clear_bit() in the
On Thu, 2011-03-03 at 11:42 +0200, Felipe Balbi wrote:
> On Wed, Mar 02, 2011 at 05:11:58PM +0100, Michael Buesch wrote:
> > @@ -175,9 +124,9 @@ static int retu_wdt_release(struct inode
> > struct retu_wdt_dev *wdev = file->private_data;
> >
> > #ifndef CONFIG_WATCHDOG_NOWAYOUT
> > - retu
Hi,
On Thu, Mar 3, 2011 at 3:53 PM, Menon, Nishanth wrote:
> On Thu, Mar 3, 2011 at 15:39, Gulati, Shweta wrote:
>> Hi,
>>
>> On Thu, Mar 3, 2011 at 3:04 PM, Menon, Nishanth wrote:
>>> On Thu, Mar 3, 2011 at 14:57, Shweta Gulati wrote:
This Patch adds OPP enteries for IVA in OMAP4 O
hi,
On Wed, Mar 2, 2011 at 1:02 PM, Menon, Nishanth wrote:
> On Wed, Feb 16, 2011 at 11:47, Shweta Gulati wrote:
>>
>> MPU voltage rail values are updated according to
>> latest OMAP4430 Data Manual Operating Condition Addendum.
>
> looks like the latest is evolving :(. I just checked against 0.
The driver makes the choice about which register layout to
use based on cpu, however it then tries to use the probed
peripheral unit version register to decide whether to access
registers that only exist in the 4430 unit.
Unfortunately, the unit with the smaller register map on the
OMAP3530 has th
The OMAP I2C driver dynamically chooses between two register sets of
differing sizes depending on the cpu type it finds itself on.
It has been observed that the existing code references non-existing
registers on OMAP3530, because while it correctly chose the smaller
register layout based on cpu ty
Describe why we can't simply probe the peripheral unit ID
to make the decision about what register map to use
Cc: patc...@linaro.org
Signed-off-by: Andy Green
---
drivers/i2c/busses/i2c-omap.c | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses
Peter Maydell noticed when running under QEMU he was getting
errors reporting 32-bit access to I2C peripheral unit registers
that are documented to be 8 or 16-bit only[1][2]
The I2C driver is blameless as it wraps its accesses in a
function using __raw_writew and __raw_readw, it turned out it
is t
The following series fixes two issues with OMAP 3 and 4 i2c support.
First, hwmod tables don't have the i2c units marked up as being
for 16-bit access only, which is mandatory.
Second, the i2c peripheral unit init code is confused about using
cpu_is...() and probed peripheral unit version, leadin
On Thu, 2011-03-03 at 15:25 +0530, Raghuveer Murthy wrote:
> OMAP4 has 2 LCD channels and corresponding DISPC_DIVISOR1 and DISPC_DIVISOR2
> registers to configure the pixel clock frequency, for the respective LCD
> displays.
>
> There is also DISPC_DIVISOR register, which by default has the ENABL
Print chip version at bootup
pack product id and version id in a way similar to Triton TWL5030
so that twl_get_si_type and twl_get_si_version can be used for TWL6030
Use this to set flags for errata based on particular chip version.
Signed-off-by: Balaji T K
---
drivers/mfd/twl-core.c | 43 ++
Convert multi byte i2c read to several single byte i2c read as workaround.
Signed-off-by: Balaji T K
---
drivers/mfd/twl-core.c | 31 +--
1 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index cd0ce54..b
Phoenix TWL6030: add version check for errata handling
This patch series has dependency on omap3: pm: TWL5030 version checking
for twl_idcode variable
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg45929.html
Balaji T K (2):
mfd: TWL6030: Add support for version detection
mfd: TWL6
Hi Paul,
On Wednesday 02 March 2011 03:03 AM, Paul Walmsley wrote:
Hi Santosh
On Tue, 1 Mar 2011, Santosh Shilimkar wrote:
-Original Message-
From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
ow...@vger.kernel.org] On Behalf Of Paul Walmsley
Sent: Saturday, February 26, 2011
On Wed, Mar 2, 2011 at 11:54 PM, Tony Lindgren wrote:
> * Govindraj [110302 02:05]:
>>
>> +static struct omap_device_pad default_serial1_pads[] __initdata = {
>> + {
>> + .name = "uart2_rx.uart2_rx",
>> + .flags = OMAP_DEVICE_PAD_REMUX |
>> > OMAP
On Wed, Mar 2, 2011 at 7:00 PM, Lesly A M wrote:
> static struct device *
> add_numbered_child(unsigned chip, const char *name, int num,
> void *pdata, unsigned pdata_len,
> @@ -1056,6 +1114,9 @@ twl_probe(struct i2c_client *client, const struct
> i2c_device_id *id)
> /*
On 3/2/2011 6:54 PM, Tony Lindgren wrote:
On 2/28/2011 3:31 AM, Paul Walmsley wrote:
Tony, I guess the omap-for-linus branch will probably need to get rebuilt
to drop that patch, once this series is merged...
Let's rather apply a fix or revert instead than start messing with
omap-for-linus. Th
From: Ming Lei
This patch supports pmu irq routed from CTI, so
make pmu/perf working on OMAP4.
The idea is from Woodruff Richard in the disscussion
about "Oprofile on Pandaboard / Omap4" on pandabo...@googlegroups.com.
Cc: Santosh Shilimkar
Cc: Woodruff Richard
Cc: Tony Lindgren
Cc: linux-om
The patch adds the new power management trace points for
the OMAP architecture.
The trace points are for:
- default idle handler. Since the cpuidle framework is
instrumented in the generic way there is no need to
add trace points in the OMAP specific cpuidle handler;
- cpufreq (DVFS),
- SoC cl
On Thu, Mar 3, 2011 at 15:39, Gulati, Shweta wrote:
> Hi,
>
> On Thu, Mar 3, 2011 at 3:04 PM, Menon, Nishanth wrote:
>> On Thu, Mar 3, 2011 at 14:57, Shweta Gulati wrote:
>>>
>>> This Patch adds OPP enteries for IVA in OMAP4 OPP Table
>>> and updates IVA voltage Rail values obtained from latest
Hi,
On Thu, Mar 3, 2011 at 3:04 PM, Menon, Nishanth wrote:
> On Thu, Mar 3, 2011 at 14:57, Shweta Gulati wrote:
>>
>> This Patch adds OPP enteries for IVA in OMAP4 OPP Table
>> and updates IVA voltage Rail values obtained from latest
>> OMAP4430 Data Manual Operating Condition Addendum.
> Do yo
The OMAP4 DISPC_DIVISOR1 is backward compatible to OMAP3xxx DISPC_DIVISOR.
However DISPC_DIVISOR is also provided in OMAP4, to control DISPC_CORE_CLK
independent of Primary and Secondary display clocks.
Renamed DISPC_DIVISOR(ch) to DISPC_DIVISORo(ch), to facilitate introduction
of DISPC_DIVISOR re
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