Hi,
On Sat, 2011-08-27 at 21:42 +0200, Alan Stern wrote:
> On Sat, 27 Aug 2011, Santosh wrote:
>
> > On Saturday 27 August 2011 07:31 PM, Alan Stern wrote:
> > > On Sat, 27 Aug 2011, Santosh wrote:
> > >
> > >> I might be wrong here, but after discussion with Govindraj on this
> > >> issue, it se
Move the erratum handling mechanism from serial.c to driver file
and utilise the same func in driver file.
Acked-by: Alan Cox
Signed-off-by: Govindraj.R
---
drivers/tty/serial/omap-serial.c | 58 ++---
1 files changed, 53 insertions(+), 5 deletions(-)
diff --g
In preparation to runtime conversion add missing uart regs to
port structure which can be used in context restore.
Also ensuring all uart reg info's are part of port structure.
Signed-off-by: Govindraj.R
---
arch/arm/plat-omap/include/plat/omap-serial.h |3 ++
drivers/tty/serial/omap-serial.
Add default mux data for all uart's if mux info is not passed from
board file to avoid breaking any board support.
Signed-off-by: Govindraj.R
---
arch/arm/mach-omap2/serial.c | 132 ++
1 files changed, 132 insertions(+), 0 deletions(-)
diff --git a/arch/
Currently we are using uart prepare and resume calls to gate uart clocks
retaining the same method.
More details on reason to retain this design is provided here:
http://www.spinics.net/lists/linux-serial/msg04128.html
Since prepare and resume hooks are moved to driver itself we can just use
a si
In preparation to UART runtime conversion. Remove certain uart specific calls
from pm24xx/34xx files. Remove uart pads from 3430 board file.
These func calls will no more be used with upcoming uart runtime design.
1.) omap_uart_can_sleep :- not needed driver can autosuspend based on
usage_count
The following UART parameters are defined within the UART driver:
1). Whether the UART uses DMA (dma_enabled), by default set to 0
2). The size of dma buffer (set to 4096 bytes)
3). The time after which the dma should stop if no more data is received.
4). The auto suspend delay that will be passed
Adapts omap-serial driver to use pm_runtime API's.
1.) Moving context_restore func to driver from serial.c
2.) Use runtime irq safe to use get_sync from irq context.
3.) autosuspend for port specific activities and put for reg access.
4.) for earlyprintk usage the debug macro will write to console
Hi Russell,
On Thu, Sep 01, 2011 at 01:51:39PM +0100, Russell King - ARM Linux wrote:
> Convert some of the sleep.S guts to C code, which makes it easier to
> use our macros and to add L2 cache handling. We provide a helper
> function, __cpu_suspend_save(), which deals with saving the common
> st
Cleanup serial.c file in preparation to addition of runtime API's in omap-serial
file. Remove all clock handling mechanism as this will be taken care with
pm runtime API's in omap-serial.c file itself.
1.) Remove omap-device enable and disable. We can can use get_sync/put_sync
API's
2.) Remove co
From: Jon Hunter
When using DMA there are two timeouts defined. The first timeout,
rx_timeout, is really a polling rate in which software polls the
DMA status to see if the DMA has finished. This is necessary for
the RX side because we do not know how much data we will receive.
The second timeout
On 1 September 2011 13:49, Russell King - ARM Linux
wrote:
> Add a dsb after the isb to ensure that the previous writes to the
> CP15 registers take effect before we enable the MMU.
>
> Signed-off-by: Russell King
> ---
> arch/arm/mm/proc-v7.S | 1 +
> 1 files changed, 1 insertions(+), 0 dele
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
Signed-off-by: Govindraj.R
---
arch/arm/mach-omap2/mux.c| 30 ++
arch/arm/mach-omap2/mux.h| 13 +++
arch/arm/mach-omap2/omap_hwmod.c
Converting uart driver to adapt to pm runtime API's.
Code re-org + cleanup.
Moving some functionality from serial.c to omap-serial.c
Changes involves:
1.) Cleaning up certain uart calls from sram_idle func.
2.) Removed all types of uart clock handling code from serial.c
3.) Using
On Wed, Sep 07, 2011 at 04:41:32PM +0100, Catalin Marinas wrote:
> On 1 September 2011 13:49, Russell King - ARM Linux
> wrote:
> > Add a dsb after the isb to ensure that the previous writes to the
> > CP15 registers take effect before we enable the MMU.
> >
> > Signed-off-by: Russell King
> > --
From: Hema HK
we need to save and restore OTG_INTERFSEL register
else we will be unable to function on resume after
OFF mode.
Reported-by: Devaraj Rangasamy
Signed-off-by: Hema HK
Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Vikram Pandita
---
drivers/usb/musb/musb_core.h |1 +
From: Vikram Pandita
RxFifoSz, TxFifoSz, RxFifoAddr, TxFifoAddr
are all indexed registers.
So before doing a context save or restore, INDEX register
should be set, then only one gets to the right register offset.
Signed-off-by: Vikram Pandita
Signed-off-by: Anand Gadiyar
---
drivers/usb/musb
From: Vikram Pandita
v1:
Recent tests with OFF mode on OMAP44xx brings out these bugs
v2:
Fix review comments from: Sergei Shtylyov
Hema HK (1):
usb: musb: omap2+: save and restore OTG_INTERFSEL
Vikram Pandita (1):
usb: musb: omap2+: fix context api's
drivers/usb/musb/musb_core.c |2
Kevin,
On Mon, Aug 29, 2011 at 7:35 PM, Kevin Hilman wrote:
> Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains
> with the newly created voltage domains.
>
> Signed-off-by: Kevin Hilman
> ---
> arch/arm/mach-omap2/Makefile | 3 +-
> arch/arm/mach-omap2/i
On 7 September 2011 17:19, Russell King - ARM Linux
wrote:
> On Wed, Sep 07, 2011 at 04:41:32PM +0100, Catalin Marinas wrote:
>> On 1 September 2011 13:49, Russell King - ARM Linux
>> wrote:
>> > Add a dsb after the isb to ensure that the previous writes to the
>> > CP15 registers take effect bef
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
during hwmod idle transition based on whether
Hi,
On Wednesday 07 September 2011 12:10:23 Koyamangalath, Abhilash wrote:
> On Tue, Aug 30, 2011 Laurent Pinchart wrote:
> > On Wednesday 10 August 2011 16:03:12 Deepthy Ravi wrote:
> >> From: Abhilash K V
> >>
> >> While resuming from the "suspended to memory" state,
> >> occasionally CCDC fa
Hello.
On 07-09-2011 4:49, Vikram Pandita wrote:
From: Hema HK
we need to save and restore OTG_INTERFSEL register
else we will be unable to function on resume after
OFF mode.
Change-Id: I6c29c69596d5f47e00cf74ab0e32bb44ef71dda9
Remove this, please.
Reported-by: Devaraj Rangasamy
S
On Mon, Sep 5, 2011 at 1:00 PM, Roedel, Joerg wrote:
> Please add a seperate function for setting the fault-handler. It is
> optional, so no need to be a value of the alloc-function.
Will do.
> Can you elaborate a bit on what the user of the api will do different
> between IOMMU_TLBMISS and IOMM
On Tue, Aug 30, 2011 Laurent Pinchart wrote:
> Hi,
>
> On Wednesday 10 August 2011 16:03:12 Deepthy Ravi wrote:
>> From: Abhilash K V
>>
>> While resuming from the "suspended to memory" state,
>> occasionally CCDC fails to get enabled and thus fails
>> to capture frames any more till the next s
On 7 September 2011 17:19, Russell King - ARM Linux
wrote:
> On Wed, Sep 07, 2011 at 04:41:32PM +0100, Catalin Marinas wrote:
>> On 1 September 2011 13:49, Russell King - ARM Linux
>> wrote:
>> > Add a dsb after the isb to ensure that the previous writes to the
>> > CP15 registers take effect bef
From: Ravi Babu
Adding musb support in ti816 EVM board file.
Signed-off-by: Ajay Kumar Gupta
Signed-off-by: Ravi Babu
---
arch/arm/mach-omap2/board-ti8168evm.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c
b/arch/arm/ma
Adding ti81xx_musb_phy_power() which will be used by musb driver through
its function pointer in board_data.
Signed-off-by: Ajay Kumar Gupta
Signed-off-by: Ravi Babu
---
arch/arm/mach-omap2/omap_phy_internal.c | 24 +++
arch/arm/plat-omap/include/plat/usb.h | 32 ++
This patch set adds support for musb interface for TI81XX platforms and
are dependent on recent patch series from Hemant Pedanekar at [1] and [2].
TI81XX platform has dual musb instances, uses CPPI4.1 DMA and has built in
usb PHY. The current set of patches supports only the first interface and
in
From: Ravi Babu
Adding musb support in ti814 EVM board file.
Signed-off-by: Ajay Kumar Gupta
Signed-off-by: Ravi Babu
---
arch/arm/mach-omap2/board-ti8148evm.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-ti8148evm.c
b/arch/arm/ma
From: Ravi Babu
TI81XX platform has two musb interfaces and uses CPPI4.1 DMA engine.
It has builtin USB PHYs as AM35x. The current set of patches adds support
for one instance and only in PIO mode.
Signed-off-by: Ajay Kumar Gupta
Signed-off-by: Ravi Babu
---
drivers/usb/musb/Kconfig |
From: Ravi Babu
The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
irqs and three address spaces for usbss, musb0 and musb1 respectively. Created
one hwmod with three irq and memory resources.
Cc: Benoit Cousson
Cc: Keshava Munegowda
Signed-off-by: Ajay Kumar Gupta
S
From: Ravi Babu
Added musb support for ti81xx platform which has two instances of musb
interface and uses CPPI4.1 DMA. The current patch set adds support for
single instance and in PIO mode only.
Signed-off-by: Ajay Kumar Gupta
Signed-off-by: Ravi Babu
---
arch/arm/mach-omap2/usb-musb.c |
From: Abhilash K V
While resuming from the "suspended to memory" state,
occasionally CCDC fails to get enabled and thus fails
to capture frames any more till the next suspend/resume
is issued.
This is a race condition which happens only when a CCDC
frame-completion ISR is pending even as ISP devi
This adds MODULE_ALIAS directives to the omap-mcbsp-dai and
omap-pcm-audio drivers so they can be auto-loaded when platform
devices are scanned.
Signed-off-by: Mans Rullgard
---
sound/soc/omap/omap-mcbsp.c |1 +
sound/soc/omap/omap-pcm.c |1 +
2 files changed, 2 insertions(+), 0 deleti
On Wed, Sep 07, 2011 at 12:07:21PM +0100, Mans Rullgard wrote:
> This adds MODULE_ALIAS directives to the omap-mcbsp-dai and
> omap-pcm-audio drivers so they can be auto-loaded when platform
> devices are scanned.
Acked-by: Mark Brown
--
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Hi
On 09/06/2011 11:14 PM, Mans Rullgard wrote:
This adds MODULE_ALIAS directives to the omap-mcbsp-dai and
omap-pcm-audio drivers so they can be auto-loaded when platform
devices are scanned.
Signed-off-by: Mans Rullgard
---
sound/soc/omap/omap-mcbsp.c |2 ++
sound/soc/omap/omap-pcm.c
Tero Kristo writes:
> Hi,
>
> On Sat, 2011-08-27 at 21:42 +0200, Alan Stern wrote:
>> On Sat, 27 Aug 2011, Santosh wrote:
>>
>> > On Saturday 27 August 2011 07:31 PM, Alan Stern wrote:
>> > > On Sat, 27 Aug 2011, Santosh wrote:
>> > >
>> > >> I might be wrong here, but after discussion with Govi
Start using the generic fault report mechanism, as provided by
the IOMMU core, and remove the now-redundant omap_iommu_set_isr API.
Always use the generic IOMMU_ERROR event type as we're only interested
in letting upper layers know about the error, so in case the faulting
device is a remote proces
Add iommu fault report mechanism to the IOMMU API, so implementations
could report about mmu faults (translation errors, hardware errors,
etc..).
Fault reports can be used in several ways:
- mere logging
- reset the device that accessed the faulting address (may be necessary
in case the device i
When mapping a memory region, split it to page sizes as supported
by the iommu hardware. Always prefer bigger pages, when possible,
in order to reduce the TLB pressure.
The logic to do that is now added to the IOMMU core, so neither the iommu
drivers themselves nor users of the IOMMU API have to d
Kevin,
On Mon, Aug 29, 2011 at 7:49 PM, Kevin Hilman wrote:
> This series focuses on cleanup and better abstraction in the voltage
> controller (VC) layer.
>
> Available in the pm-wip/voltdm_b branch of my linux-omap-pm tree
> git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.gi
Kevin,
On Mon, Aug 29, 2011 at 7:35 PM, Kevin Hilman wrote:
> This is the first phase of the OMAP voltage layer cleanup. The
> primary goal is to cleanup/reorganize data structures to facilitate
> splitting apart the voltage processor (VP) and voltage controller (VC)
> into separate layers.
>
>
Hi Kevin,
On Mon, Aug 29, 2011 at 8:10 PM, Kevin Hilman wrote:
> This series focuses on cleanup of the remaining voltage domain layer
> (non-VC/VP code)
>
> Available in the pm-wip/voltdm_d branch of my linux-omap-pm tree
> git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git
>
Hi,
On Wed, Sep 07, 2011 at 10:32:25PM +0530, Ajay Kumar Gupta wrote:
> +static int __devinit dsps_probe(struct platform_device *pdev)
> +{
> + const struct platform_device_id *id = platform_get_device_id(pdev);
> + const struct dsps_musb_wrapper *wrp =
> + (str
Kevin,
On Mon, Aug 29, 2011 at 7:58 PM, Kevin Hilman wrote:
> This series focuses on cleanup and better abstraction in the voltage
> processor (VP) layer.
>
> Available in the pm-wip/voltdm_c branch of my linux-omap-pm tree
> git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm.git
Mike, Kevin,
On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette wrote:
> From: Nishanth Menon
>
> We have multiple interrupt status hidden in the PRM interrupt status
> reg. Make this handling generic to allow us to pull out LDO status such
> as those for ABB from it using the same data structure a
Hi Mike,
On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette wrote:
> Due to voltage domain trimming and silicon characterstics some silicon
> may experience instability when operating at a high voltage. To
> compensate for this an Adaptive Body-Bias ldo exists. First featured in
> OMAP3630, the pu
On Wed, Aug 24, 2011 at 4:09 PM, Benoit Cousson wrote:
> Add a device-tree node for the spinlock.
> Remove the static device build code if CONFIG_OF
> is set.
> Update the hwspinlock driver to use the of_match method.
> Add the information in Documentation/devicetree.
>
> Signed-off-by: Benoit Cou
Mike,
I have a minor comment below.
On Thu, Jun 30, 2011 at 2:25 AM, Mike Turquette wrote:
> The Adaptive Body-Bias ldo can be set to bypass or Forward Body-Bias
> after voltage scaling is performed.
>
> This patch implements the Adaptive Body-Bias ldo initialization routine
> and the transition
On Wed, 31 Aug 2011 at 17:22:47 Jarkko Nikula wrote:
> Hi
>
> Updates and continuation to my McBSP cleanup RFC set I sent before
> vacation period. Motivation here is to get rid off all is_omap and
> CONFIG_ARCH stuff and to make code a step more generic (and for
> preparing to move code out under
Hilman, Kevin wrote on Tuesday, August 30, 2011 6:03 AM:
> Hemant Pedanekar writes:
>
>> This patch adds minimum required hwmod data (e.g., UARTs) for bootup of
>> TI81XX devices (currently common data for TI816X and TI814X is added).
>>
>> Signed-off-by: Hemant Pedanekar
>
> I haven't looked
Hilman, Kevin wrote on Tuesday, August 30, 2011 5:43 AM:
> Hemant Pedanekar writes:
>
>> This patch adds minimal support and build configuration for TI8148 EVM.
>> Also adds support for low level debugging on UART1 console on the EVM.
>>
>> Signed-off-by: Hemant Pedanekar
>
> [...]
>
>> +sta
On Wed, 2011-09-07 at 19:59 +0200, Hilman, Kevin wrote:
> Tero Kristo writes:
>
> > Hi,
> >
> > On Sat, 2011-08-27 at 21:42 +0200, Alan Stern wrote:
> >> On Sat, 27 Aug 2011, Santosh wrote:
> >>
> >> > On Saturday 27 August 2011 07:31 PM, Alan Stern wrote:
> >> > > On Sat, 27 Aug 2011, Santosh w
The series contains few fixes and clean-up for OMAP.
Briefly,
- HWMOD fix for the address space count
- Improving the L3 register accesses
- Bug fix in the L3 error handler
- Sparce warning and indentation fixes in L3 error handler
- Print master id in case of L3 custom errors for better debug.
- A
From: sricharan
The address space count API returns the number of address space
entries for a hwmod including a additional null value present in the
address space structure introduced recently. The devices which
have multiple hwmods and use device_build_ss are broken with this,
as their address r
From: Todd Poynor
With the current sequence of registering the irq and
assigning it to the app_irq, debug_irq driver variables,
there can be corner cases where the pending irq gets
triggered immediately after registering, handler gets called
resulting in a crash. So changed this sequence.
Signed
From: sricharan
The indentation problems in the l3 noc and smx
error handler files are fixed.
Signed-off-by: sricharan
Signed-off-by: Santosh Shilimkar
Reported-by: Paul Walmsley
Cc: Paul Walmsley
---
arch/arm/mach-omap2/omap_l3_noc.c | 58 +++---
arch/arm/mach-omap2/omap_l3_noc.h
Fix the address overlap with Emulation domain (EMU).
The previous mapping was entering into EMU mapping
and was not as per comments. Fix the mapping accordingly.
[giris...@ti.com: Helped fixing comments.]
Signed-off-by: Girish S G
Signed-off-by: Santosh Shilimkar
---
arch/arm/plat-omap/include
Local timer clock is sourced from the CPU clock and hence changes
along with CPU clock. These per CPU local timers are used as
clock-events, so they need to be reconfigured on CPU frequency
change as part of CPUfreq governor.
Newly introduced clockevents_reconfigure() needs to know the
twd clock-r
From: sricharan
The initiator id gets logged in the l3 target registers for custom error.
So print it to aid debugging.
Based on a internal patch by Devaraj Rangasamy
Signed-off-by: sricharan
Signed-off-by: Santosh Shilimkar
---
arch/arm/mach-omap2/omap_l3_noc.c | 26 -
From: Todd Poynor
* Changed the way of accessing L3 target
registers from standard base rather
than relative to STDERRLOG_MAIN.
* Use ffs() to find error source from
the L3_FLAGMUX_REGERRn register.
* Remove extra l3_base[] entry.
* Modified L3 custom error message.
Signed-off-by: Todd
From: sricharan
Fix below sparse warnings from the l3-noc and l3-smx error handlers
files.
arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases'
was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol
'omap3_l3_debug_bases' was
On 09/07/2011 08:10 PM, Mark Brown wrote:
On Wed, Sep 07, 2011 at 12:07:21PM +0100, Mans Rullgard wrote:
This adds MODULE_ALIAS directives to the omap-mcbsp-dai and
omap-pcm-audio drivers so they can be auto-loaded when platform
devices are scanned.
Acked-by: Mark Brown
Now looks good.
Acke
On Wed, Sep 7, 2011 at 10:32 PM, Ajay Kumar Gupta wrote:
> From: Ravi Babu
>
> The usb subsystem (usbss) in ti81xx has two musb interfaces. There are three
> irqs and three address spaces for usbss, musb0 and musb1 respectively. Created
> one hwmod with three irq and memory resources.
>
> Cc: Ben
Resend with linux-kernel mail list included.
On Wed, Sep 7, 2011 at 10:22 PM, TAO HU wrote:
> Hi, All
>
> We seems got a schedule/migration issue in a OMAP4430 dual-core system.
> The kernel base is 2.6.35.7 and we're using CFS.
>
> In a stress testing, we created a huge amount of processes/threa
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