On Fri, 2011-09-23 at 12:10 +0530, K, Mythri P wrote:
> Hi,
>
> On Fri, Sep 23, 2011 at 11:31 AM, Tomi Valkeinen
> wrote:
> > On Fri, 2011-09-23 at 11:22 +0530, K, Mythri P wrote:
> >
> >> > - What is dcofreq? Looking at the code, it tells if the pixel clock is >
> >> > 1000MHz. Why is such a fi
On Thu, Sep 22, 2011 at 09:48:27AM -0400, Felipe Contreras wrote:
> On Tue, Sep 20, 2011 at 1:54 PM, Laurent Pinchart
> wrote:
> > On Tuesday 20 September 2011 12:01:46 Roedel, Joerg wrote:
> >> On Sat, Sep 17, 2011 at 08:02:22PM -0400, Laurent Pinchart wrote:
> >> > On Wednesday 14 September 2011
Kevin,
> -Original Message-
> From: linux-arm-kernel-boun...@lists.infradead.org [mailto:linux-
> arm-kernel-boun...@lists.infradead.org] On Behalf Of Kevin Hilman
> Sent: Friday, September 23, 2011 2:37 AM
> To: cpuf...@vger.kernel.org; Dave Jones
> Cc: Nishanth Menon; linux-omap@vger.ker
Hi Tony,
[...]
>> I've applied these into dmtimer branch with some changes to simplify
>> things further. I've also merged it into linux-omap master branch
>> for further testing.
>>
>> I'll reply to your patches with the changes I've done. Care give the
>> dmtimer branch a try and see if I've miss
From: Mythri P K
Add support to dump the HDMI PLL dividers such as regm, regn etc
and other clock dumps such as pixel clock rate, TMDS clock rate.
changes since V2:
Add pixel clock and TMDS clock dump and remove dcofreq and DISPC clock source
print.
Signed-off-by: Mythri P K
---
drivers/video
On Thu, Sep 22, 2011 at 11:31 PM, Paul Walmsley wrote:
> Hi
>
> a few comments
>
> On Thu, 22 Sep 2011, Keshava Munegowda wrote:
>
>> following 4 hwmod structures are added
>> 1. usb_host_hs hwmod of usbhs with uhh base address and functional clock,
>> 2. usb_ehci_hs hwmod with irq and base addres
On Fri, 2011-09-23 at 15:02 +0530, mythr...@ti.com wrote:
> From: Mythri P K
>
> Add support to dump the HDMI PLL dividers such as regm, regn etc
> and other clock dumps such as pixel clock rate, TMDS clock rate.
>
> changes since V2:
> Add pixel clock and TMDS clock dump and remove dcofreq and
On Friday 23 September 2011 01:15 AM, Kevin Hilman wrote:
> Deepthi Dharwar writes:
>
>> The following patch series implements global registration of cpuidle
>> states, and also has the necessary data structure changes to
>> accommodate the per-cpu writable members of the cpuidle_states
>> struct
Hi,
On Fri, Sep 23, 2011 at 4:15 PM, Tomi Valkeinen wrote:
> On Fri, 2011-09-23 at 15:02 +0530, mythr...@ti.com wrote:
>> From: Mythri P K
>>
>> Add support to dump the HDMI PLL dividers such as regm, regn etc
>> and other clock dumps such as pixel clock rate, TMDS clock rate.
>>
>> changes sinc
From: Mythri P K
Add support to dump the HDMI wrapper, core, PLL and PHY registers
through debugfs.
Signed-off-by: Mythri P K
---
drivers/video/omap2/dss/core.c|4 +
drivers/video/omap2/dss/dss.h |1 +
drivers/video/omap2/dss/dss_features.c|5 +
drivers/
> So I'd suggest one of two approaches:
>
> 1. If the pin muxing can follow the PM runtime status of the UHH IP block,
> then the pin mux data should be associated with the UHH hwmod.
No, the mux is applicable only to ehci and ohci , where as
sysconfig is applicable to uhh ( usb_host_hs class).
>
> From: Laurent Pinchart [laurent.pinch...@ideasonboard.com]
> Sent: Wednesday, September 21, 2011 2:36 PM
> To: Ravi, Deepthy
> Cc: mche...@infradead.org; t...@atomide.com; Hiremath, Vaibhav;
> linux-me...@vger.kernel.org; li...@arm.linux.org.uk;
> lin
hi Kevin
On Fri, Sep 23, 2011 at 4:00 AM, Hilman, Kevin wrote:
> Hi Abhilash,
>
> Abhilash K V writes:
>
>> This patch adds the basic initialization of voltage layer
>> for AM35x. Since AM35x doesn't support voltage scaling,
>
> I must admit to still being confused by this series.
>
> This patch
Hello,
Following set contains the version 9 of this work. This patch set contains
a number of patches tagged as 'TEMP', they are only meant for testing
purposes and to provide proof of concept. Most of the 'TEMP' patches are
related to UART runtime handling and they will be replaced by work done
b
From: R, Govindraj
Add API to enable IO pad wakeup capability based on mux dynamic pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability
for the given pads. Wakeup capability will be enabled/disabled
during hwmod idle transit
From: R, Govindraj
Add API to determine IO-PAD wakeup event status for a given
hwmod dynamic_mux pad.
Signed-off-by: Govindraj.R
---
arch/arm/mach-omap2/mux.c| 30 ++
arch/arm/mach-omap2/mux.h| 13 +++
arch/arm/mach-om
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
names, which are then matched to the particular PRCM interrupt bit
depending on the specific OMAP SoC be
PM interrupt handling is now done through the PRCM chain handler. The
interrupt handling logic is also split in two parts, to server IO and
WKUP events separately. This allows us to handle IO chain events in a
clean way.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/pm34xx.c | 104
Temporary testing related patch, not meant for integration.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/board-4430sdp.c | 12 +---
1 files changed, 1 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c
b/arch/arm/mach-omap2/board-4430sdp.c
index c7c
This is handled automatically by the PRCM chain interrupt mechanism now.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/pm34xx.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 712fd15..4bbf1cd 1006
Prevents a hang when omap_device would want to print something for
serial console device while enabling / disabling its clocks.
Should be handled properly by serial runtime PM support.
Signed-off-by: Tero Kristo
Cc: Govindraj.R
---
arch/arm/plat-omap/omap_device.c |4 ++--
1 files changed,
These are no longer needed as omap_hwmod takes care of multiplexing of pads.
Should be handled properly with serial runtime PM support patches.
Signed-off-by: Tero Kristo
Cc: Govindraj.R
---
arch/arm/mach-omap2/serial.c | 25 +
1 files changed, 1 insertions(+), 24 dele
This patch is just a temporary hack to allow serial to work properly with
the PRCM chain handler. Should be replaced with a proper implementation
by serial runtime PM support.
Signed-off-by: Tero Kristo
Cc: Govindraj.R
---
arch/arm/mach-omap2/serial.c | 29 +
d
This is no longer needed as it will be handled within serial driver itself.
This part should be properly handled with serial runtime support.
Signed-off-by: Tero Kristo
Cc: Govindraj.R
---
arch/arm/mach-omap2/pm34xx.c | 19 ---
1 files changed, 0 insertions(+), 19 deletions(-)
Just for PRCM chain handler testing purposes. This should be replaced with
a proper implementation.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/serial.c | 71 -
1 files changed, 69 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/se
OMAP PRM driver is initialized based on availability of PRM hwmods.
This patch will sequentially check for a list of known PRM hwmods and
will add an omap device if any is found.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/devices.c | 46 +
1 file
Temporary patch for testing purposes, not meant for integration.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/mux.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index b27c061..642fe3f 100644
--- a/arch/arm/m
These are needed because runtime PM is disabled during suspend, and
it is bad if we get interrupts from the PRCM chain handler during it.
Now, PRCM interrupt forwarding is disabled until the suspend->complete,
which makes sure that all the needed drivers are up.
Signed-off-by: Tero Kristo
Cc: Kev
This driver will eventually support OMAP soc PRM module features, e.g. PRCM
chain interrupts and voltage processor / controller. This patch only adds
basic skeleton for the driver that can be probed for omap3 and omap4.
Signed-off-by: Tero Kristo
Cc: Paul Walmsley
Cc: Kevin Hilman
Cc: Samuel Or
OMAP mux now provides a service routine to parse pending wakeup events
and to call registered ISR whenever active wakeups are detected. This
routine is called directly from PRCM interrupt handler.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/mux.c | 38 +++
This patch is temporary until Paul can provide a final version.
Signed-off-by: Tero Kristo
Cc: Paul Walmsley
---
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 56
1 files changed, 56 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_da
hi Kevin,
On Fri, Sep 23, 2011 at 3:05 PM, Hilman, Kevin wrote:
>
> Abhilash K V writes:
>
>> In case of AM3517 & AM3505, SmartReflex is not applicable so
>> we must not enable it.
>
> This part is fine, but...
>
>> So omap3_twl_init() is now not called when the processor does not
>> support SR.
This patch is temporary until Benoit can provide final version.
Signed-off-by: Tero Kristo
Cc: Benoit Cousson
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 65
1 files changed, 65 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_d
On Fri, Sep 23, 2011 at 11:28 AM, Paul Walmsley wrote:
> On Fri, 23 Sep 2011, J, KEERTHY wrote:
>
>> On Fri, Sep 23, 2011 at 10:48 AM, Paul Walmsley wrote:
>> > On Thu, 22 Sep 2011, Keerthy wrote:
>> >
>> >> ---
>> >> arch/arm/mach-omap2/clock44xx_data.c | 4 ++--
>> >> 1 files changed, 2 ins
hi Kevin
Thanks for reviewing the patch.
On Fri, Sep 23, 2011 at 3:25 AM, Hilman, Kevin wrote:
>
> Abhilash K V writes:
>
>> This patch-set adds support for suspension to RAM and
>> resumption on the AM3517. This includes:
>> 1. Patch to disable dynamic sleep (as it is not supported
>>on AM3
On Fri, Sep 23, 2011 at 11:33 AM, Paul Walmsley wrote:
> Hi
>
> some comments
>
> On Thu, 22 Sep 2011, Keerthy wrote:
>
>> The register set and the
>> bit fields might vary across OMAP versions. Hence
>> creating a structure comprising of all the registers
>> and bit fields to make the driver unif
On Fri, Sep 23, 2011 at 11:45 AM, Paul Walmsley wrote:
> + Benoît
>
> Hi,
>
> On Thu, 22 Sep 2011, Keerthy wrote:
>
>> From: Benoit Cousson
>>
>> Adding the system control module hwmod.
>
> Have the autogeneration scripts been updated ?
The hwmod is autogenerated. I have taken this from Benoit.
Paul Walmsley writes:
> On Thu, 22 Sep 2011, Paul Walmsley wrote:
>
>> On Thu, 22 Sep 2011, Kevin Hilman wrote:
>>
>> > Now that we have OPP layer, and OMAP CPUfreq driver is using it, we no
>> > longer need/use the clock framework code for filling up CPUfreq
>> > tables. Remove it.
>> >
>> >
Vishwanath Sripathy writes:
[...]
>> +#ifdef CONFIG_CPU_FREQ_DEBUG
>> +pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old,
>> freqs.new);
>> +#endif
>> +
>> +ret = clk_set_rate(mpu_clk, freqs.new * 1000);
>
> Do you plan to post follow up patches to scale voltage along with Clock
Now that we have OPP layer, and OMAP CPUfreq driver is using it, we no
longer need/use the clock framework code for filling up CPUfreq
tables. Remove it.
Signed-off-by: Kevin Hilman
---
arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 80 --
arch/arm/mach-omap2/clock.c
"Koyamangalath, Abhilash" writes:
[...]
>>> @@ -485,6 +489,8 @@ console_still_active:
>>>
>>> int omap3_can_sleep(void)
>>> {
>>> + if (cpu_is_omap3505() || cpu_is_omap3517())
>>> + return 0;
>>
>> This needs to be a separate patch with a descriptive changelog and
>> justificat
Hi Abhilash,
"Koyamangalath, Abhilash" writes:
> On Fri, Sep 23, 2011 at 4:00 AM, Hilman, Kevin wrote:
>> Hi Abhilash, Abhilash K V writes:
>>> This patch adds the basic initialization of voltage layer for
>>> AM35x. Since AM35x doesn't support voltage scaling,
>> I must admit to still being co
"Munegowda, Keshava" writes:
> On Thu, Sep 22, 2011 at 7:02 PM, Ming Lei wrote:
>> Hi,
>>
>> On Thu, Sep 22, 2011 at 7:37 PM, Keshava Munegowda
>> wrote:
>>> From: Keshava Munegowda
>>>
>>> The Hwmod structures and Runtime PM features are implemented
>>> For EHCI and OHCI drivers of OMAP3 and
Hi,
On Thu, Sep 22 2011, Yong Zhang wrote:
> Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
> We run all interrupt handlers with interrupts disabled
> and we even check and yell when an interrupt handler
> returns with interrupts enabled (see commit [b738a50a:
> genirq
Hi
On Thu, 22 Sep 2011, Paul Walmsley wrote:
> On Thu, 22 Sep 2011, Keerthy wrote:
>
> > From: Vishwanath BS
> >
> > OMAP4460 specific clocks are not getting added as the
> > cpu_is_omap44xx is choosing only OMAP4430 specific clock nodes.
>
> > Changing it to add to OMAP4460 specific clocks a
Hi Tony, Grant,
Here is the first set of patches to add device-tree support for OMAP3+
platforms.
That series mainly adds a minimal OMAP2+ generic board file for basic
DT support on OMAP2420, OMAP2430, OMAP3, OMAP4 and beyond. The goal is
to remove even the minimal static devices init in order to
Add initial device-tree support for OMAP4 SoC.
This is based on the original panda board patch done by Manju:
http://permalink.gmane.org/gmane.linux.ports.arm.omap/60393
Add the generic GIC interrupt-controller from ARM.
Add an empty "soc" node to contain non memory mapped IPs
(DSP, MPU, IPU...)
Add SoC specific map_io function to be used by the generic DT
board file. This is an intermediate step before having some
generic DT aware map_io function.
Signed-off-by: Benoit Cousson
Cc: Tony Lindgren
---
arch/arm/mach-omap2/common.c | 18 ++
arch/arm/plat-omap/
Based on the original omap4-panda.dts file from Manju.
http://www.spinics.net/lists/linux-omap/msg55836.html
Add memory information and a default bootargs to allow
a boot from RAMDISK.
Signed-off-by: Benoit Cousson
Cc: Grant Likely
Cc: G, Manjunath Kondaiah
---
arch/arm/boot/dts/omap4-panda.d
Add initial OMAP3 soc file with empty ocp bus.
Based on initial patch from Manju:
http://www.spinics.net/lists/linux-omap/msg55830.html
Signed-off-by: Benoit Cousson
Cc: Grant Likely
Cc: G, Manjunath Kondaiah
---
arch/arm/boot/dts/omap3.dtsi | 44 ++
Add OMAP3 beagleboard DTS file to use the omap3.dtsi
SoC file.
Add a default bootargs line to allow a boot from RAMDISK
Add memory node information.
Signed-off-by: Benoit Cousson
Cc: G, Manjunath Kondaiah
---
arch/arm/boot/dts/omap3-beagle.dts | 29 +
1 files cha
Add the SDP/Blaze (Software Development Board) support with
device tree.
That file is based on the omap4-panda.dts.
Signed-off-by: Benoit Cousson
Cc: Grant Likely
Cc: G, Manjunath Kondaiah
---
arch/arm/boot/dts/omap4-sdp.dts | 29 +
1 files changed, 29 insertions(
Still needed to boot until the i2c & twl driver is adapted to
device-tree. Otherwise the voltage control code will try to
access the twl and crash.
Signed-off-by: Benoit Cousson
Cc: Tony Lindgren
---
arch/arm/mach-omap2/board-generic.c | 41 +-
1 files changed,
Re-cycle the original board-generic file to support Device Tree
for every OMAP2+ variants.
Note: Since it is a completely new content in the existing file
I removed the original copyright.
The current approach is an intermediate step before having only
one machine descriptor that will use some gen
Add device-tree support for the l3-noc driver.
Use platform_driver_register to defer the probing at device init
time.
Add documentation for the l3-noc bindings.
Signed-off-by: Benoit Cousson
Cc: Tony Lindgren
Cc: Santosh Shilimkar
---
.../devicetree/bindings/arm/omap/l3-noc.txt| 19
Used the main OCP node to add bindings with the l3_noc driver.
Remove l3_noc static device creation if DT is populated.
Signed-off-by: Benoit Cousson
Cc: Tony Lindgren
Cc: Santosh Shilimkar
---
arch/arm/boot/dts/omap4.dtsi |3 ++-
arch/arm/mach-omap2/devices.c |5 +
2 files change
Add nodes for devices used by PM code (mpu, dsp, iva).
Add an empty cpus node as well as recommended in the DT spec.
Remove mpu, dsp, iva devices init if dt is populated.
Signed-off-by: Benoit Cousson
Cc: Grant Likely
Cc: Kevin Hilman
---
Documentation/devicetree/bindings/arm/omap/dsp.txt |
Hi Arnd,
Please pull omap cleanup branch again from:
git://github.com/tmlind/linux.git cleanup
This contains a fix for earlier cleanup patches and has omap_device
cleanup and PM cleanup merged in.
As some of the later cleanup was based on a -rc6 while the
earlier branch was based on -rc4, the g
On Fri, 23 Sep 2011 15:46:08 +0300, Tero Kristo said:
> Following set contains the version 9 of this work. This patch set contains
> a number of patches tagged as 'TEMP', they are only meant for testing
> purposes and to provide proof of concept. Most of the 'TEMP' patches are
> related to UART run
Arnd,
* Kevin Hilman [110921 09:09]:
> Hi Arnd,
>
> Arnd Bergmann writes:
>
> > On Tuesday 20 September 2011 23:46:11 Arnd Bergmann wrote:
> >
> >> It seems that you replace the #ifdef in the board-flash.c file
> >> with a similar #ifdef in the header that replaces this with an
> >> empty inli
* Benoit Cousson [110923 12:50]:
> Used the main OCP node to add bindings with the l3_noc driver.
> Remove l3_noc static device creation if DT is populated.
> --- a/arch/arm/mach-omap2/devices.c
> +++ b/arch/arm/mach-omap2/devices.c
> @@ -16,6 +16,7 @@
> #include
> #include
> #include
> +#in
* Benoit Cousson [110923 12:50]:
> Add SoC specific map_io function to be used by the generic DT
> board file. This is an intermediate step before having some
> generic DT aware map_io function.
Thanks, I'll apply this into cleanup branch and with the related
conversion of board files.
Regards,
* Benoit Cousson [110923 12:50]:
> Re-cycle the original board-generic file to support Device Tree
> for every OMAP2+ variants.
> Note: Since it is a completely new content in the existing file
> I removed the original copyright.
I'd suggest just keeping it, maybe just update the comments
accordi
* Benoit Cousson [110923 12:50]:
> Still needed to boot until the i2c & twl driver is adapted to
> device-tree. Otherwise the voltage control code will try to
> access the twl and crash.
That sounds OK to me for now. For merging these patches, how
about the following:
- Kevin queues up the omap_
On Fri, Sep 23, 2011 at 10:23:11PM +0200, Benoit Cousson wrote:
> Based on the original omap4-panda.dts file from Manju.
> http://www.spinics.net/lists/linux-omap/msg55836.html
>
> Add memory information and a default bootargs to allow
> a boot from RAMDISK.
>
> Signed-off-by: Benoit Cousson
> C
On Fri, Sep 23, 2011 at 10:23:19PM +0200, Benoit Cousson wrote:
> Add nodes for devices used by PM code (mpu, dsp, iva).
>
> Add an empty cpus node as well as recommended in the DT spec.
>
> Remove mpu, dsp, iva devices init if dt is populated.
>
> Signed-off-by: Benoit Cousson
> Cc: Grant Like
On Fri, Sep 23, 2011 at 04:12:08PM -0700, Tony Lindgren wrote:
> * Benoit Cousson [110923 12:50]:
> > Still needed to boot until the i2c & twl driver is adapted to
> > device-tree. Otherwise the voltage control code will try to
> > access the twl and crash.
>
> That sounds OK to me for now. For m
[...]
> After debugging this myself a bit, here's what I think may be going on.
> This may not be the only problem but here's at least one of them.
>
> First, debounce clocks are disabled in the runtime_suspend callback.
>
> When a GPIO is freed and it's the last one in the bank, bank->mod_usage
>
Hi Valdis.Kletnieks,
On Sat, Sep 24, 2011 at 3:53 AM, wrote:
> On Fri, 23 Sep 2011 15:46:08 +0300, Tero Kristo said:
>> Following set contains the version 9 of this work. This patch set contains
>> a number of patches tagged as 'TEMP', they are only meant for testing
>> purposes and to provide p
On Sat, 24 Sep 2011 10:54:29 +0530, "Sripathy, Vishwanath" said:
> UART Runtime patches are already posted for review and it's also
> targeted for next merge window. Our intention is to push both the
> features together for next merge window.
Oh, OK. That should work then. Thanks for the clarific
Paul,
On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
> The series contains few fixes and clean-up for OMAP.
> Briefly,
> - HWMOD fix for the address space count
> - Improving the L3 register accesses
> - Bug fix in the L3 error handler
> - Sparce warning and indentation fixes in
The series adds OMAP4 MPUSS (MPU SubSystem) power management support for
suspend (S2R), CPU hotplug and CPUidle.
This is a repost with minor changelog updates, re-basing against 3.1-rc6,
adding reiwed-by/tested-by etc and re-ordering of errata patch.
The main change is the errata i688 is cleanly s
OMAP4 L2X0 initialisation code uses BUG_ON() for the ioremap()
failure scenarios.
Use WARN_ON() instead and allow graceful function exits.
This was suggsted by Kevin Hilman during
OMAP4 PM code review.
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by:
This patch adds SAR RAM support on OMAP4430. SAR RAM used to save
and restore the HW context in low power modes.
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by: Vishwanath BS
---
arch/arm/mach-omap2/include/mach/omap4-common.h |1 +
arch/arm/mach
This patch exports APIs to get base address for GIC
distributor, CPU interface, SCU and PL310 L2 Cache which
are used in OMAP4 PM code.
This was suggested by Kevin Hilman during
OMAP4 PM code review.
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by: Vi
On OMAP4430 ES1.0, Power Management features are not supported.
Avoid omap4_pm_init() on ES1.0 silicon so that we can continue
to use same kernel binary to boot on all OMAP4 silicons.
The ES1.0 boot failure with OMAP4 PM series was because of
the clockdomain initialisation code. Hardware supervise
As per OMAP4430 TRM, the dynamic dependency between MPUSS -> EMIF
and MPUSS -> L4PER/L3_* and DUCATI -> L3_* clockdomains is enable
by default. Refer register CM_MPU_DYNAMICDEP description for details.
But these dynamic dependencies doesn't work as expected. The hardware
recommendation is to enabl
Initialise hardware supervised mode for all clockdomains if it's
supported. Initiate sleep transition for other clockdomains,
if they are not being used.
Signed-off-by: Santosh Shilimkar
Signed-off-by: Rajendra Nayak
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by: Vishwanath BS
---
Allocate the memory to save secure ram context which needs
to be done when MPU is hitting OFF mode.
The ROM code expects a physical address to this memory
and hence use memblock APIs to reserve this memory as part
of .reserve() callback. Maximum size as per secure RAM requirements
is allocated.
S
Remove the __INIT from omap_secondary_startup() so that it can
be re-used for CPU hotplug.
While at this, remove the un-used AUXBOOT register reference.
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by: Vishwanath BS
---
arch/arm/mach-omap2/omap-heads
Default arch_idle() isn't good enough for OMAP4 because of aync bridge errata
and necessity of NOPs post WFI to avoid speculative prefetch aborts.
Hence Use OMAP4 custom omap_do_wfi() hook for default idle.
Later in the series, async bridge errata work-around patch updates the
omap_do_wfi() with n
With OMAP4 suspend, idle and hotplug series, we no longer need
do_wfi() macro.
Remove the same.
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by: Vishwanath BS
---
arch/arm/mach-omap2/include/mach/omap4-common.h | 10 --
1 files changed, 0 i
The SGI(Software Generated Interrupts) are not wakeup capable from
low power states. This is known limitation on OMAP4 and needs to be
worked around by using software forced clockdomain wake-up. CPU0 forces
the CPU1 clockdomain to software force wakeup.
More details can be found in OMAP4430 TRM -
Program non-boot CPUs to hit lowest supported power state
when it is off-lined using cpu hotplug framework.
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by: Vishwanath BS
---
arch/arm/mach-omap2/include/mach/omap4-common.h |7 +
arch/arm/mach-
OMAP WakeupGen is the interrupt controller extension used along
with ARM GIC to wake the CPU out from low power states on
external interrupts.
The WakeupGen unit is responsible for generating the wakeup event
from the incoming interrupts and enable bits. It is implemented
in the MPU always ON powe
Add WakeupGen and secure GIC low power support to save and restore
it's registers. WakeupGen Registers are saved to pre-defined SAR RAM layout
and the restore is automatically done by hardware(ROM code) while coming
out of MPUSS OSWR or Device off state. Secure GIC is saved using secure
API and res
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPUx sleep code is common for hotplug, suspend and CPUilde.
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Revi
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by: Vishwanath BS
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
b/arch/arm/mach-omap2/om
Add OMAP4 CPUIDLE support. CPU1 is left with defualt idle and
the low power state for it is managed via cpu-hotplug.
This patch adds MPUSS low power states in cpuidle.
C1 - CPU0 ON + CPU1 ON + MPU ON
C2 - CPU0 OFF + CPU1 OFF + MPU CSWR
C3 - CPU0 OFF + CPU1 OFF + MPU OSWR
When MPUSS hits off-mode, L2 cache is lost. This patch adds L2X0
necessary maintenance operations and context restoration in the
low power code.
Signed-off-by: Santosh Shilimkar
Acked-by: Jean Pihet
Reviewed-by: Kevin Hilman
Tested-by: Vishwanath BS
---
arch/arm/mach-omap2/include/mach/omap-s
CPU local timer(TWD) stops when the CPU is transitioning into
deeper C-States. Since these timers are not wakeup capable, we
need the wakeup capable global timer to program the wakeup time
depending on the next timer expiry.
It can be handled by registering a global wakeup capable timer along
with
Save VFP CPU context using CPU PM notifier chain. VFP context
is lost when CPU hits OFF state.
Signed-off-by: Santosh Shilimkar
Reviewed-by: Kevin Hilman
Tested-by: Vishwanath BS
---
arch/arm/mach-omap2/cpuidle34xx.c | 15 +++
1 files changed, 15 insertions(+), 0 deletions(-)
di
This patch adds the MPUSS OSWR (Open Switch Retention) support. The MPUSS
OSWR configuration is as below.
- CPUx L1 and logic lost, MPUSS logic lost, L2 memory is retained
OMAP4460 onwards, MPUSS power domain doesn't support OFF state any more
anymore just like CORE power domain. The deepe
On OMAP4 SOC, intecronnects has many write buffers in the async bridges
and they need to be drained before CPU enters into standby state.
Patch 'OMAP4: PM: Add CPUX OFF mode support' added CPU PM support
but OMAP errata i688 (Async Bridge Corruption) needs to be taken
care to avoid issues like sys
This patch adds MPUSS(MPU Sub System) power domain
CSWR(Close Switch Retention) support to system wide suspend.
For MPUSS power domain to hit retention(CSWR or OSWR), both
CPU0 and CPU1 power domains need to be in OFF or DORMANT state,
since CPU power domain CSWR is not supported by hardware
Signe
On OMAP secure/emulation devices, certain APIs are exported by secure
code. Add an infrastructure so that relevant operations on secure
devices can be implemented using it.
While at this, rename omap44xx-smc.S to omap-smc.S since the common APIs
can be used on other OMAP's too.
Signed-off-by: San
Hi
On Fri, 23 Sep 2011, Munegowda, Keshava wrote:
> Paul Walmsley wrote:
>
> > So I'd suggest one of two approaches:
> >
> > 1. If the pin muxing can follow the PM runtime status of the UHH IP block,
> > then the pin mux data should be associated with the UHH hwmod.
>
> No, the mux is applica
On Fri, 23 Sep 2011, Munegowda, Keshava wrote:
> On Thu, Sep 22, 2011 at 11:31 PM, Paul Walmsley wrote:
>
> But the question arises here , why do we need these ehci and ohci as two
> different hwmods containing only irq and base address? It is required
> for future - to implement remote wakeup
Hi Santosh
On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
> > The series contains few fixes and clean-up for OMAP.
> > Briefly,
> > - HWMOD fix for the address space count
> > - Improving the L3 register accesses
> > - Bug fix in t
On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
> Hi Santosh
>
> On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
>
>> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
>>> The series contains few fixes and clean-up for OMAP.
>>> Briefly,
>>> - HWMOD fix for the address s
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