On Sat, Nov 26, 2011 at 5:48 AM, Shawn Guo wrote:
> On Mon, Nov 21, 2011 at 05:40:46PM -0800, Mike Turquette wrote:
>> Many platforms support simple gateable clks and fixed-rate clks that
>> should not be re-implemented by every platform.
>>
>> This patch introduces a gateable clk with a common pr
On Sat, Nov 26, 2011 at 5:22 AM, Shawn Guo wrote:
> On Mon, Nov 21, 2011 at 05:40:45PM -0800, Mike Turquette wrote:
>> + * To prevent this consider setting the CLK_GATE_SET_RATE flag on any
>> + * clk where you also set the CLK_PARENT_SET_RATE flag
>
> Eh, this is how flag CLK_GATE_SET_RATE is bor
After dpll1 reprogramming has been moved from setup_arch() to
kernel_init(), I've been observing several issues, resulting in
undesired system behaviour on my Amstrad Delta. This series fixes
those issues.
Janusz Krzysztofik (5):
ARM: OMAP1: Fix dpll1 default rate reprogramming method
ARM: OMA
Otherwise timing is not accurate, resulting in devices which depend
on it, like omap-keypad, broken.
Created against linux-3.2-rc2.
Depends on patch "init: allow for recalibration of loops per jiffy".
Tested on top of linux-omap/fixes on Amstrad Delta.
Signed-off-by: Janusz Krzysztofik
Cc: Andre
This is required on ARM OMAP1 platform, after DPLL reprogramming has
been fixed by moving it from setup_arch() to kernel_init().
Created against linux-3.2-rc2.
Signed-off-by: Janusz Krzysztofik
Cc: Andrew Morton
Cc: Sameer Nanda
---
include/linux/delay.h |4 +++-
init/calibrate.c |
DPLL1 reprogramming to a different rate is actually blocked inside
omap1_select_table_rate(), resulting in the defalut rate of 60 MHz
always used instead of the one selected in .config. Fix it.
Created against linux-3.2-rc2, tested on Amstrad Delta on top of
linux-omap/fixes.
Signed-off-by: Janus
Use the exact value found in omap1_rate_table, otherwise I have been
experiencing issues with correct timekeeping on my Amstrad Delta.
Created and tested on top of patch "ARM: OMAP1: Fix dpll1 default rate
reprogramming method".
Signed-off-by: Janusz Krzysztofik
---
arch/arm/mach-omap1/clock_da
According to comments in omap1_select_table_rate(), reprogramming dpll1
is tricky, and should always be done from SRAM.
While being at it, move OMAP730 special case handling inside
omap_sram_reprogram_clock().
Created on top of omap-fixes, not yet in mainline as of 3.2-rc3.
Tested on Amstrad Delt
Hi guys,
Thanks for your comment.
On Sun, Nov 27, 2011 at 6:16 AM, Sylwester Nawrocki wrote:
> Cc: LMML
>
> On 11/26/2011 05:31 AM, tom.leim...@gmail.com wrote:
>> From: Ming Lei
>>
>> One face detection IP[1] is integared inside OMAP4 SoC, so
>> introduce this driver to make face detection fun
On Sat, 26 Nov 2011, Paul Walmsley wrote:
> Hi Benoît,
>
> a question about this patch.
...
> > + .name = "mipi_stm",
> > + .pa_start = 0x54161000,
> > + .pa_end = 0x54161fff,
> > + .flags = ADDR_TYPE_RT
> ... none of the
Hi Benoît,
a question about this patch.
On Fri, 18 Nov 2011, Cousson, Benoit wrote:
> From: Benoit Cousson
> Date: Fri, 18 Nov 2011 11:42:12 +0100
> Subject: [PATCH] ARM: OMAP4: hwmod data: Add support for the debug modules
>
> The OMAP4 DEBUG subsystem contains all the IPs used for emulation,
On Sat, Nov 26, 2011 at 12:47 AM, Shawn Guo wrote:
> On Wed, Nov 23, 2011 at 12:33:47PM -0800, Turquette, Mike wrote:
>> On Tue, Nov 22, 2011 at 6:03 PM, Saravana Kannan
>> wrote:
>> > On 11/21/2011 05:40 PM, Mike Turquette wrote:
>> > No strong opinion, but can we call this clk_ops for brevity?
On Fri, Nov 25, 2011 at 11:06 PM, Shawn Guo wrote:
> On Mon, Nov 21, 2011 at 05:40:42PM -0800, Mike Turquette wrote:
>> .speaking of which, clk_set_rate has been overhauled and is now
>> recursive. *collective groan*. clk_set_rate is still simple for the
>> common case of simply setting a singl
One comment was missed.
On Mon, Nov 21, 2011 at 05:40:46PM -0800, Mike Turquette wrote:
[...]
> +struct clk_hw_ops clk_hw_gate_set_enable_ops = {
const?
> + .enable = clk_hw_gate_enable_set,
> + .disable = clk_hw_gate_disable_clear,
> + .recalc_rate = clk_hw_gate_recalc_rate,
> +
Cc: LMML
On 11/26/2011 05:31 AM, tom.leim...@gmail.com wrote:
> From: Ming Lei
>
> One face detection IP[1] is integared inside OMAP4 SoC, so
> introduce this driver to make face detection function work
> on OMAP4 SoC.
Face detection IP is of course not specific to OMAP, I've seen it in other S
overwriten -> overwritten
Signed-off-by: NeilBrown
---
drivers/mfd/twl4030-irq.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
index 3ac7216..b69bb51 100644
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl403
As tertiary interrupts are handled by handle_twl4030_sih calling
handle_nested_irq, they do not need their own separate irq thread.
So mark them as 'nested_thread' interrupts to avoid the extra thread
creation.
Tested on GTA04 Pheonux.
Signed-off-by: NeilBrown
---
drivers/mfd/twl4030-irq.c |
irq_set_chained_handler sets 'desc->handle_irq'.
However this irq is called by handle_nested_irq from handle_twl4030_pih,
and that uses action->thread_fn.
So the handled set with irq_set_chained_handler is never called.
So change to use request_threaded_irq instead - that sets the correct field.
As the interrupt source is only cleared by the threaded interrupt
service routine, we need to make the base interrupt IRQF_ONESHOT.
Without this, the first interrupt from the TWL4030 cause the CPU to
enter an infinite loop trying to handle to interrupt but never
clearing it.
Signed-off-by: NeilBro
Hi,
The recent tidying up of twl4030-irq seems to have left it broken.
At least it doesn't work for me on my gta04 (www.gta04.org). The
first interrupt from the device freezes the whole system (by being
constantly delivered)
The following 4 patches make it work for me and addresses some other
l
On Sat, Nov 26, 2011 at 11:12:47AM +, Alan Cox wrote:
> On Sat, 26 Nov 2011 12:31:44 +0800
> tom.leim...@gmail.com wrote:
>
> > From: Ming Lei
> >
> > One face detection IP[1] is integared inside OMAP4 SoC, so
> > introduce this driver to make face detection function work
> > on OMAP4 SoC.
>
On Mon, Nov 21, 2011 at 05:40:46PM -0800, Mike Turquette wrote:
> Many platforms support simple gateable clks and fixed-rate clks that
> should not be re-implemented by every platform.
>
> This patch introduces a gateable clk with a common programming model of
> gate control via a write of 1 bit t
On Mon, Nov 21, 2011 at 05:40:45PM -0800, Mike Turquette wrote:
[...]
> +/**
> + * DOC: Using the CLK_PARENT_SET_RATE flag
> + *
> + * __clk_set_rate changes the child's rate before the parent's to more
> + * easily handle failure conditions.
> + *
> + * This means clk might run out of spec for a s
On Sat, 26 Nov 2011 12:31:44 +0800
tom.leim...@gmail.com wrote:
> From: Ming Lei
>
> One face detection IP[1] is integared inside OMAP4 SoC, so
> introduce this driver to make face detection function work
> on OMAP4 SoC.
>
> This driver is platform independent, so in theory can
> be used to dri
On Wed, Nov 23, 2011 at 12:33:47PM -0800, Turquette, Mike wrote:
> On Tue, Nov 22, 2011 at 6:03 PM, Saravana Kannan
> wrote:
> > On 11/21/2011 05:40 PM, Mike Turquette wrote:
[...]
> >> +is modified slightly for brevity:
> >> +
> >> +struct clk {
> >> + const char *name;
> >>
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