발신자 : linux-omap@vger.kernel.org
수신자 : PSYON
제목 : Returned mail: Data format error
첨부 파일명 : mail.zip(mail.doc
.com)
검사 결과 : mail.zip/mail.doc
Hi Paul,
On Thu, Nov 1, 2012 at 8:51 AM, Jean Pihet wrote:
> Hi Paul,
>
> On Wed, Oct 31, 2012 at 10:44 PM, Paul Walmsley wrote:
>> Hi
>>
>> On Wed, 31 Oct 2012, Jean Pihet wrote:
>>
>>> Paul,
>>> Could you please check with the 2 calls to PM QoS from the I2C code
>>> commented out? This will ru
From: Julia Lawall
Just use WARN_ON rather than an if containing only WARN_ON(1).
A simplified version of the semantic patch that makes this transformation
is as follows: (http://coccinelle.lip6.fr/)
//
@@
expression e;
@@
- if (e) WARN_ON(1);
+ WARN_ON(e);
//
Signed-off-by: Julia Lawall
-
Hi Gururaja,
On Wed, Oct 31, 2012 at 12:39 AM, Hebbar, Gururaja
wrote:
> On Wed, Oct 31, 2012 at 01:58:32, Joel A Fernandes wrote:
>> Hi Gururaja,
>>
>> On Mon, Oct 29, 2012 at 10:45 AM, Hebbar, Gururaja
>> wrote:
>> > Matt,
>> >
>> > On Wed, Oct 10, 2012 at 20:00:49, Porter, Matt wrote:
>> >>
This patch is a follow up to show how to remove all the various
register offsets from the DT for the CPSW driver. This applies on top
of the bug fix I posted earlier for IO mapping leak.
Since I am currently awaiting a replacement for my defective
BeagleBone, this patch is compile tested only.
Th
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
AM335x supports various low power modes as documented
in section 8.1.4.3 of the AM335x TRM which is available
@ http://www.ti.com/litv/pdf/spruh73f
DeepSleep0 mode offers the lowest power mode with limited
wakeup sources without a system
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
AM33XX has only one usable timer in the WKUP domain.
Currently the timer instance in WKUP domain is used
as the clockevent and the timer in non-WKUP domain
as the clocksource. The timer in WKUP domain can keep
running in suspend from a 32K
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
Get rid of some unnecessary header file inclusions
and also use __ASSEMBLER__ macros to allow the
various register offsets from PM assembly code
which be added in a subsequent patch.
Signed-off-by: Vaibhav Bedia
Ideally you should spli
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
The first entry for CPGMAC0 should be ADDR_MAP_ON_INIT
instead of ADDR_TYPE_RT to ensure the omap hwmod code
maps the memory space at init and writes to the SYSCONFIG
registers.
Signed-off-by: Vaibhav Bedia
---
Sorry again similar quest
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
The hwmod data for OCMCRAM in AM33XX was commented out.
This data is needed by the power management code, hence
uncomment the same and register the OCP interface for it.
Why this data is needed by PM code ?
Regards
Santosh
--
To unsubsc
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
Add the reset status offset for WKUP_M3 in the hwmod data
Signed-off-by: Vaibhav Bedia
---
arch/arm/mach-omap2/omap_hwmod_33xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hw
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
The power management code for AM33XX is a late_initcall
and the PM features depend on the mailbox for IPC.
In preparation for this, convert the mailbox init to
a device_initcall.
Signed-off-by: Vaibhav Bedia
---
Looks fine
--
To unsubsc
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
Mailbox IP on AM33XX, is the same as that present
in OMAP4. The single instance of Mailbox module
contains 8 sub-modules and facilitates communication
between MPU, PRUs and WKUP_M3.
The first mailbox sub-module is assigned for
communicati
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
On AM33XX, the mailbox module between the MPU and the
WKUP-M3 co-processor facilitates a one-way communication.
MPU uses the assigned mailbox sub-module to issue the
interrupt to the WKUP-M3 co-processor which then goes
and reads the the I
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
Signed-off-by: Vaibhav Bedia
---
arch/arm/boot/dts/am33xx.dtsi | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index bb31bff..e2cbf24 100
On Friday 02 November 2012 06:02 PM, Vaibhav Bedia wrote:
From: Vaibhav Hiremath
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
Actually OMAP also uses only one timer. The clocksource
is taken care by 32K syntimer till OMAP4 and by realtime
counter
Hi Nishant,
On Sat, Nov 3, 2012 at 2:14 PM, Kevin Hilman
wrote:
> Hi Nishanth,
>
>
> On 10/25/2012 09:21 AM, Jean Pihet wrote:
>>
>> Hi Nishant,
>>
>> On Tue, Oct 23, 2012 at 11:43 PM, Nishanth Menon wrote:
>>>
>>> smartreflex.c now resides in drivers/power/avs directory, but class
>>> driver
>>
On Sat, Nov 03, 2012 at 19:11:54, Kevin Hilman wrote:
[...]
>
> Yes, please try with that. Won't that be necessary anyways for situations
> where the powerdomain goes off?
>
Yes, we probably got lucky with the minimal resume routine.
Regards,
Vaibhav
--
To unsubscribe from this list: send th
On Sat, Nov 03, 2012 at 18:34:30, Kevin Hilman wrote:
[...]
> >>
> >> Doesn't this also mean that you won't get timer wakeups
> >> in idle? Or are you keeping the domain where the clockevent is
> >> on during idle?
> >>
> >
> > The lowest idle state that we are targeting will have MPU powered
> >
On Sat, Nov 03, 2012 at 14:06:38, Bedia, Vaibhav wrote:
> Hi Russ,
>
> On Sat, Nov 03, 2012 at 05:44:21, Russ Dill wrote:
> [...]
> > > - if (!cpu_is_omap44xx())
> > > + if (!cpu_is_omap44xx() || !soc_is_am33xx())
> > > bit = mbox_read_reg(p->irqdisable) & ~bit;
> >
>
On 11/03/2012 01:17 PM, Bedia, Vaibhav wrote:
On Sat, Nov 03, 2012 at 17:50:25, Kevin Hilman wrote:
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
AM33XX PM code depends on Mailbox module for IPC
between MPU and WKUP_M3.
OK, but what if I try to build for AM33xx without starting from
omap2plus_
On 11/03/2012 01:17 PM, Bedia, Vaibhav wrote:
On Sat, Nov 03, 2012 at 17:45:03, Kevin Hilman wrote:
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
From: Vaibhav Hiremath
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
AM33XX has only one usable timer
On Sat, Nov 03, 2012 at 17:50:25, Kevin Hilman wrote:
> On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
> > AM33XX PM code depends on Mailbox module for IPC
> > between MPU and WKUP_M3.
>
> OK, but what if I try to build for AM33xx without starting from
> omap2plus_defconfig?
I honestly didn't thin
On Sat, Nov 03, 2012 at 17:46:06, Kevin Hilman wrote:
> On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
> > Signed-off-by: Vaibhav Bedia
>
> Even simple patches need a simple changelog.
Again, sorry about this. Will take care in the future.
Regards,
Vaibhav
--
To unsubscribe from this list: sen
On Sat, Nov 03, 2012 at 17:45:03, Kevin Hilman wrote:
> On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
> > From: Vaibhav Hiremath
> >
> > The current OMAP timer code registers two timers -
> > one as clocksource and one as clockevent.
> > AM33XX has only one usable timer in the WKUP domain
> > so on
Hi Nishanth,
On 10/25/2012 09:21 AM, Jean Pihet wrote:
Hi Nishant,
On Tue, Oct 23, 2012 at 11:43 PM, Nishanth Menon wrote:
smartreflex.c now resides in drivers/power/avs directory, but class driver
is in mach-omap2. High time we move it off to drivers/power/avs.
Great to see the SR fully mov
On 10/23/2012 10:43 PM, Nishanth Menon wrote:
SoC integration of SmartReflex AVS block is varied. Some use
Voltage Processor for a hardware loop in certain OMAP SoC (called
hardware loop), while others have just the AVS block without
hardware loop automatic calibration mechanism for AVS block
to
T
On 11/03/2012 12:47 PM, Bedia, Vaibhav wrote:
Hi Kevin,
On Sat, Nov 03, 2012 at 17:13:54, Kevin Hilman wrote:
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
AM33XX has only one usable timer in the WKUP domain.
Currently the timer instance in WKUP domain is used
as the clockevent and the timer
Hi Kevin,
On Sat, Nov 03, 2012 at 17:13:54, Kevin Hilman wrote:
> On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
> > AM33XX has only one usable timer in the WKUP domain.
> > Currently the timer instance in WKUP domain is used
> > as the clockevent and the timer in non-WKUP domain
> > as the clocksou
We are removing plat data which was used till now to init and
exit phy. We no longer need this since dwc3-core takes care of
initializing and shutting-down the phy using usb_phy_init()
and usb_phy_shutdown().
Signed-off-by: Vivek Gautam
---
drivers/usb/dwc3/dwc3-exynos.c | 16
This patch adds support to parse probe data for
dwc3-exynos driver using device tree.
Signed-off-by: Vivek Gautam
---
drivers/usb/dwc3/dwc3-exynos.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3
Changes from v2:
- Respined for 'dwc3' branch on Felipe's usb tree.
Changes from v1:
- Removed setting-up of "dev.coherent_dma_mask", since of/platform.c
itself takes care of it.
Vivek Gautam (2):
USB: dwc3-exynos: Add support for device tree
USB: DWC3: EXYNOS: Remove platform data for d
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
AM33XX PM code depends on Mailbox module for IPC
between MPU and WKUP_M3.
OK, but what if I try to build for AM33xx without starting from
omap2plus_defconfig?
IOW, instead of changing the default defconfig, AM33xx should select
this when PM
is e
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
Signed-off-by: Vaibhav Bedia
Even simple patches need a simple changelog.
Kevin
arch/arm/boot/dts/am33xx.dtsi | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
From: Vaibhav Hiremath
The current OMAP timer code registers two timers -
one as clocksource and one as clockevent.
AM33XX has only one usable timer in the WKUP domain
so one of the timers needs suspend-resume support
to restore the configuration to
On 10/30/2012 12:24 PM, Peter Ujfalusi wrote:
When booting with DT the OF core can fill up the resources provided within
the DT blob.
The current way of handling the DT boot prevents us from removing hwmod data
for platforms only suppose to boot with DT (OMAP5 for example) since we need
to keep t
On 11/02/2012 01:32 PM, Vaibhav Bedia wrote:
AM33XX has only one usable timer in the WKUP domain.
Currently the timer instance in WKUP domain is used
as the clockevent and the timer in non-WKUP domain
as the clocksource. The timer in WKUP domain can keep
running in suspend from a 32K clock and he
On 11/02/2012 09:43 AM, Pantelis Antoniou wrote:
[...]
And then use the standard DT support to create later the platform_device that
does represent the new super-cape devices.
We know this is the ideal case. In fact that's the long term goal and we had
internal discussions about it.
Sinc
Hi Daniel,
On Sat, Nov 03, 2012 at 03:46:53, Daniel Mack wrote:
[...]
>
> What event did you use to bring the system back to life? I tried a GPIO
> button which has "linux,wakeup" set and is connected to GPIO bank 0, but
> without success.
I used uart wakeup in my testing. I see that you have CP
Hi Russ,
On Sat, Nov 03, 2012 at 05:44:21, Russ Dill wrote:
[...]
> > - if (!cpu_is_omap44xx())
> > + if (!cpu_is_omap44xx() || !soc_is_am33xx())
> > bit = mbox_read_reg(p->irqdisable) & ~bit;
>
> Do you mean &&?
>
I didn't change that line but it looks ok to me :)
Hi Tony,
On Sat, Nov 03, 2012 at 00:30:04, Tony Lindgren wrote:
[...]
>
> Patches have been posted to move the mailbox related
> files out of arch/arm, so you'll have to update those
> for that. Please see thread "[PATCH 0/2] ARM: OMAP:
> mailbox out of plat code" for more information.
>
Thanks
Hi Daniel,
* Daniel Mack, November 03, 2012 1:06 AM:
> I'm testing these patches with an AM33xx board that has the first musb
> port wired to an USB type A plug, but it doesn't yet work for me.
> So there is no host interface registered. I'm unsure on how to fix this,
> and I didn't get an answe
42 matches
Mail list logo
