Hi Kevin,
On Wednesday 20 March 2013 05:36 PM, Sourav Poddar wrote:
Realised the list to whom the patch was send got dropped. Ccing them
all..
On Wednesday 20 March 2013 05:18 PM, Sourav Poddar wrote:
Hi Kevin,
On Tuesday 19 March 2013 12:24 AM, Kevin Hilman wrote:
Sourav
Add pinmux configurations for MII based CPSW ethernet to am335x-bone.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.
Default mode is nothing but the values required for the module during
active state. With this
Add pinmux configurations for RGMII based CPSW ethernet to am335x-evmsk.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.
Default mode is nothing but the values required for the module during
active state. With this
Adding pinmux configuration to AM33xx board dts file.
Mugunthan V N (3):
ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
Add pinmux configurations for RGMII based CPSW ethernet to am335x-evm.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.
Default mode is nothing but the values required for the module during
active state. With this
On 3/24/2013 8:59 PM, Viresh Kumar wrote:
Some assignments of policy- min/max/cur/cpuinfo.min_freq/cpuinfo.max_freq
aren't required as part of it is done by cpufreq driver or cpufreq core.
Remove them.
At some places we merge multiple lines together too.
Cc: Sekhar Nori nsek...@ti.com
On 25 March 2013 14:06, Sekhar Nori nsek...@ti.com wrote:
There is a line in the code a little above the ones you deleted that
also sets these same variables. I guess you were relying on that line to
set policy-cur, but that also sets policy-{min, max} which can be
cleaned up.
This code is
Will,
On Tuesday 19 March 2013 03:58 PM, Will Deacon wrote:
On Tue, Mar 19, 2013 at 06:39:38AM +, Santosh Shilimkar wrote:
On Monday 18 March 2013 10:36 PM, Will Deacon wrote:
[..]
Well, we could just add the warn_once prints but that doesn't stop debug
from breaking after the first
On 3/25/2013 2:15 PM, Viresh Kumar wrote:
On 25 March 2013 14:06, Sekhar Nori nsek...@ti.com wrote:
There is a line in the code a little above the ones you deleted that
also sets these same variables. I guess you were relying on that line to
set policy-cur, but that also sets policy-{min, max}
Kevin,
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March 1st 2013). Patch-set incorporates comments from Nishant
Menon (Thanks for review NM) and his acked-by tags. I would like to get this
queued for 3.10 merge window if you are ok with the series.
OMAP5 and future OMAP based SOCs has backward compatible MPUSS
IP block with OMAP4. It's programming model is mostly similar.
Hence consolidate the OMAP MPUSS code so that it can be re-used
on OMAP5 and future SOCs.
No functional change.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by:
On OMAP5, RM_CPUi_CPUi_CONTEXT offset has changed. Update the code
so that same code works for OMAP4+ devices.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 13 +
1 file changed, 9
OMAP5 has backward compatible PRCM block and it's programming
model is mostly similar to OMAP4. Same is going to be maintained
for future OMAP4 based SOCs. Hence consolidate the OMAP4 power
management code so that it can be re-used on OMAP5 and later devices.
With consolidated code, let basic
With EMIF clock-domain put under hardware supervised control, memory
corruption and untraceable crashes are observed on OMAP5. Further
investigation revealed that there is a weakness in the PRCM on this
specific dynamic dependency.
Async bridge issue which resulted in memory corruption and lock
In addition to the standard power-management technique, the OMAP5
MPU subsystem also employs an SR3-APG (mercury) power management
technology to reduce leakage.
It allows for full logic and memories retention on MPU_C0 and MPU_C1 and
is controlled by the PRCM_MPU.
Acked-by: Nishanth Menon
Enables MPUSS ES2 power management mode using ES2_PM_MODE in
AMBA_IF_MODE register.
0x0: ES1 behavior, CPU cores would enter and exit OFF mode together. Broken
0x1: ES2 behavior, CPU cores are allowed to enter/exit OFF mode independently.
The AMBA_IF_MODE register value is stored on SAR RAM and
With consolidated code, now we can add the .init_late hook for
OMAP5 to enable power management and mux initialization.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arm/mach-omap2/board-generic.c |1 +
arch/arm/mach-omap2/common.h
While waking up CPU from off state using clock domain force wakeup, restore
the CPU power state to ON state before putting CPU clock domain under
hardware control. Otherwise CPU wakeup might fail. The change is recommended
for all OMAP4+ devices though the PRCM weakness was observed on OMAP5
When the entire MPUSS cluster is powered down in device off state, L2 cache
memory looses it's content and hence while targetting such a state,
l2 cache needs to be flushed to main memory.
Add the necessary low power code support for the same.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by:
Add power management code to handle the CPU off mode to enable CPUP hotplug
mode for OMAP5 devices. Separate suspend finisher is used for OMAP5(Cortex-A15)
because it doesn't use SCU power status register and external PL310 L2 cache
which makes code flow bit different.
Acked-by: Nishanth Menon
Current OMAP4 CPUIdle driver is using omap4_mpuss_read_prev_context_state()
function to check whether the MPU cluster lost context or not. Thanks to
couple CPUIdle, cluster low power entry is almost guaranteed and hence
the programmed cluster check is enough in idle exit path. The API was
more of
The OMAP5 idle driver can re-use OMAP4 CPUidle driver implementation thanks
to compatible MPUSS design.
Though unlike OMAP4, on OMAP5 devices, MPUSS CSWR (Close Switch Retention)
power states can be achieved with respective power states on CPU0 and CPU1
power domain. This mode was broken on OMAP4
The OMAP5 idle driver can re-use most of OMAP4 CPUidle driver
implementation. Also the next derivative SOCs are going to re-use
the MPUSS so, same driver with minor updates can be re-used.
Prepare the code so that its easier to add CPUidle support for
OMAP5 devices.
Acked-by: Nishanth Menon
From: Nishanth Menon n...@ti.com
OMAP5 and OMAP4 have different device instance offsets.
So to handle them properly, use a runtime detected instance offset
Other bit offsets and register offsets remained constant.
Creating a new function is not really worthwhile here as the logic
will be
OMAP4 CPUidle driver registration call is under a loop which leads
to calling cpuidle_register_driver twice which is not intended.
Fix it by moving the driver registration outside the loop.
Reported-by: Nishanth Menon n...@ti.com
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh
If the CPUidle device registration fails for some reason, we should
unregister the driver on error path.
Fix the code accordingly. Also when at it, check of the driver registration
failure too.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
It is useful to know the CPU power state along with MPUSS power state
in a supported C-state. Since the data is available via sysfs, one can
avoid scrolling the source code for precise construction of C-state.
Reported-by: Nishanth Menon n...@ti.com
Acked-by: Nishanth Menon n...@ti.com
In MPUSS OSWR(Open Switch Retention), entire CPU cluster is powered down
except L2 cache memory. For MPUSS OSWR state, both CPU's needs to be in
power off state.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
On 2013-03-22 17:36, Tony Lindgren wrote:
Would the Kconfig option be acceptable?
Yes I think that's better than cmdline option in this case considering that
the cmdline option won't be needed at some point in the future.
Here's a diff for the changes for Overo. This is not a real patch
On 25 March 2013 15:11, Sekhar Nori nsek...@ti.com wrote:
So down in the cpufreq driver probe below, we bail out if freq_table is
not provided. So all this checking for freq_table in the code you pasted
above is superfluous. If you can clean that part up and add checking for
Hi Samuel,
I've rebased this now on top of 3.9-rc4. Please pull this into your
next branch when appropriate. Thanks.
The following changes since commit 8bb9660418e05bb1845ac1a2428444d78e322cc7:
Linux 3.9-rc4 (2013-03-23 16:52:44 -0700)
are available in the git repository at:
On Mon, Mar 25, 2013 at 09:11:00AM +, Santosh Shilimkar wrote:
Will,
Hi Santosh,
Are you going to send the patch for 3.9-rcx ? As I said before without the
patch OMAP4 CPUILDE is unusable because of that debug noise and hence it
will be good to get that patch in
It's in Russell's tree,
On Monday 25 March 2013 04:19 PM, Will Deacon wrote:
On Mon, Mar 25, 2013 at 09:11:00AM +, Santosh Shilimkar wrote:
Will,
Hi Santosh,
Are you going to send the patch for 3.9-rcx ? As I said before without the
patch OMAP4 CPUILDE is unusable because of that debug noise and hence it
During common-clock migration, .clkdm_name field got missed
for clkdiv32k_ick clock, which leaves clk_24mhz_clkdm
unused; so boot process will try to disable the clockdomain
even childs of this clock is enabled, which keeps child modules
in idle mode.
This fixes the kernel crash observed on
Hi Santosh,
On Monday 25 March 2013 03:34 PM, Santosh Shilimkar wrote:
Kevin,
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March 1st 2013). Patch-set incorporates comments from Nishant
Menon (Thanks for review NM) and his acked-by tags. I would like to
On Monday 25 March 2013 05:16 PM, Lokesh Vutla wrote:
Hi Santosh,
On Monday 25 March 2013 03:34 PM, Santosh Shilimkar wrote:
Kevin,
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March 1st 2013). Patch-set incorporates comments from Nishant
Menon
Hi Santosh,
On Monday 25 March 2013 03:34 PM, Santosh Shilimkar wrote:
Kevin,
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March 1st 2013). Patch-set incorporates comments from Nishant
Menon (Thanks for review NM) and his acked-by tags. I would like to
On Monday 25 March 2013 05:07 PM, Vaibhav Hiremath wrote:
During common-clock migration, .clkdm_name field got missed
for clkdiv32k_ick clock, which leaves clk_24mhz_clkdm
unused; so boot process will try to disable the clockdomain
even childs of this clock is enabled, which keeps child
On 03/22/2013 05:35 PM, Russell King - ARM Linux wrote:
On Fri, Mar 22, 2013 at 02:04:42PM +0100, Peter Ujfalusi wrote:
Russell: can we remove the tasklet use from dma-omap and start the DMA right
away in omap_dma_issue_pending()? This is the only way to prevent channel
swap when starting
On Monday 25 March 2013 05:57 PM, Sourav Poddar wrote:
Hi Santosh,
On Monday 25 March 2013 03:34 PM, Santosh Shilimkar wrote:
Kevin,
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March 1st 2013). Patch-set incorporates comments from Nishant
Menon
Hi Rajendra,
On Monday 25 March 2013 06:17 PM, Rajendra Nayak wrote:
On Monday 25 March 2013 05:57 PM, Sourav Poddar wrote:
Hi Santosh,
On Monday 25 March 2013 03:34 PM, Santosh Shilimkar wrote:
Kevin,
Here is the refreshed version(v2) of the OMAP5 PM suspport which was posted
earlier (March
On 25/03/13 13:30, Mark Jackson wrote:
On our custom AM335x cpu board, I have had several kernel crashes via my
userspace program.
snip
And here's another similar oops ...
[16565.691706] Unable to handle kernel NULL pointer dereference at virtual
address
[16565.700289] pgd =
On 25/03/13 13:59, Mark Jackson wrote:
On 25/03/13 13:30, Mark Jackson wrote:
On our custom AM335x cpu board, I have had several kernel crashes via my
userspace program.
snip
And here's another similar oops ...
snip
Another big blowout ...
[16910.346870] BUG: Bad page state in process
2013/3/25 Mark Jackson mpfj-l...@mimc.co.uk:
On 25/03/13 13:59, Mark Jackson wrote:
On 25/03/13 13:30, Mark Jackson wrote:
On our custom AM335x cpu board, I have had several kernel crashes via my
userspace program.
Is the problem still present when booting with nohlt ?
snip
And here's
On 25/03/13 15:06, jean-philippe francois wrote:
2013/3/25 Mark Jackson mpfj-l...@mimc.co.uk:
On 25/03/13 13:59, Mark Jackson wrote:
On 25/03/13 13:30, Mark Jackson wrote:
On our custom AM335x cpu board, I have had several kernel crashes via my
userspace program.
Is the problem still
The omap PCM driver provides a set_threshold callback which gets called by the
PCM driver when either playback or capture is started. The only DAI driver which
sets this callback is the mcbsp driver. This patch removes the callback from the
PCM driver and moves the invocation of the
On Mon, Mar 25, 2013 at 01:39:29PM +0100, Peter Ujfalusi wrote:
On 03/22/2013 05:35 PM, Russell King - ARM Linux wrote:
On Fri, Mar 22, 2013 at 02:04:42PM +0100, Peter Ujfalusi wrote:
Russell: can we remove the tasklet use from dma-omap and start the DMA
right
away in
On Thu, Mar 21, 2013 at 11:06:47AM +, Mark Rutland wrote:
On TC2 this series leads to using the vexpress 24MHz clock as the sched clock
in preference to the architected timer:
Architected local timer running at 24.00MHz (virt).
Switching to timer-based delay loop
Registered
On Tue, Mar 19, 2013 at 10:54:25AM -0400, Eduardo Valentin wrote:
This patch updates the documentation to remove
all warnings and errors reported by scripts/kernel-doc.
Most are missing arguments due to wrong format.
Cc: Nishanth Menon n...@ti.com
Signed-off-by: Eduardo Valentin
Hi Russell,
On 03/19/2013 12:59 PM, Tony Lindgren wrote:
Hi Russell,
Can we use your commit 71856843 (ARM: OMAP: use consistent error checking)
as an immutable base for further omap dmtimer and gpmc work?
I saw that you updated your clean-up branch. Ok to use the below commit
[1] as a base
On 03/25/2013 12:26 PM, Russell King - ARM Linux wrote:
On Thu, Mar 21, 2013 at 11:06:47AM +, Mark Rutland wrote:
On TC2 this series leads to using the vexpress 24MHz clock as the sched clock
in preference to the architected timer:
Architected local timer running at 24.00MHz (virt).
Hi,
On Thu, Dec 20, 2012 at 10:16:56AM -0600, Jon Hunter wrote:
On 12/19/2012 11:59 PM, Santosh Shilimkar wrote:
On Monday 17 December 2012 02:57 PM, Andreas Fenkart wrote:
Please add some changelog here too.
::
In pm suspend the omap_hsmmc driver can't detect SDIO IRQs. This
is
On Monday 25 March 2013, Rob Herring wrote:
I count integrator-cp, realview, versatile and non-DT VExpress that do
this (not surprisingly) and 25 platforms or timer implementations plus
arm64 that do sched_clock setup in time_init. What's broken by not
moving these earlier?
timekeeping_init()
On 03/25/2013 03:36 PM, Arnd Bergmann wrote:
On Monday 25 March 2013, Rob Herring wrote:
I count integrator-cp, realview, versatile and non-DT VExpress that do
this (not surprisingly) and 25 platforms or timer implementations plus
arm64 that do sched_clock setup in time_init. What's broken by
TI omap2 mcspi allows the slave devices to configure the behavior of
the SPI master. This patch adds device tree support to the existing
options.
Signed-off-by: Matthias Brugger matthias@gmail.com
---
Documentation/devicetree/bindings/spi/omap-spi.txt | 23
Hi Sakari,
On Sunday 24 March 2013 23:46:01 Sakari Ailus wrote:
Pali Rohár wrote:
On Thursday 07 March 2013 23:18:27 Sakari Ailus wrote:
On Wed, Mar 06, 2013 at 10:44:41PM +0100, Sebastian Reichel wrote:
On Wed, Mar 06, 2013 at 09:20:16PM +0100, Pali Rohár wrote:
On Wednesday 06 March
On Mon, Mar 25, 2013 at 09:28:10PM +, Rob Herring wrote:
On 03/25/2013 12:26 PM, Russell King - ARM Linux wrote:
On Thu, Mar 21, 2013 at 11:06:47AM +, Mark Rutland wrote:
On TC2 this series leads to using the vexpress 24MHz clock as the sched
clock
in preference to the
Commit 90173882ed15a8034d6d162da5f343a2c7d87587 (omap: add dsp platform
device) used CONFIG_BRIDGE_DVFS were it obviously meant
CONFIG_TIDSPBRIDGE_DVFS. Fix that.
Signed-off-by: Paul Bolle pebo...@tiscali.nl
---
Untested. As this typo has been in the tree since v2.6.37, this really
needs some
On 25-03-2013 14:22, Greg KH wrote:
On Tue, Mar 19, 2013 at 10:54:25AM -0400, Eduardo Valentin wrote:
This patch updates the documentation to remove
all warnings and errors reported by scripts/kernel-doc.
Most are missing arguments due to wrong format.
Cc: Nishanth Menon n...@ti.com
On 03/25/2013 05:53 PM, John Stultz wrote:
On 03/25/2013 03:36 PM, Arnd Bergmann wrote:
On Monday 25 March 2013, Rob Herring wrote:
I count integrator-cp, realview, versatile and non-DT VExpress that do
this (not surprisingly) and 25 platforms or timer implementations plus
arm64 that do
-Original Message-
From: Nayak, Rajendra
Sent: Monday, March 25, 2013 6:07 PM
To: Hiremath, Vaibhav
Cc: linux-omap@vger.kernel.org; Tony Lindgren; Paul Walmsley; linux-
arm-ker...@lists.infradead.org
Subject: Re: [PATCH] ARM: AM33XX: Add missing .clkdm_name to
clkdiv32k_ick clock
On Tuesday 26 March 2013 10:42 AM, Hiremath, Vaibhav wrote:
-Original Message-
From: Nayak, Rajendra
Sent: Monday, March 25, 2013 6:07 PM
To: Hiremath, Vaibhav
Cc: linux-omap@vger.kernel.org; Tony Lindgren; Paul Walmsley; linux-
arm-ker...@lists.infradead.org
Subject: Re: [PATCH]
-Original Message-
From: Nayak, Rajendra
Sent: Tuesday, March 26, 2013 10:51 AM
To: Hiremath, Vaibhav
Cc: linux-omap@vger.kernel.org; Tony Lindgren; Paul Walmsley; linux-
arm-ker...@lists.infradead.org
Subject: Re: [PATCH] ARM: AM33XX: Add missing .clkdm_name to
clkdiv32k_ick clock
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