On Friday 12 July 2013 06:10 AM, Suman Anna wrote:
On 07/11/2013 04:59 AM, Grygorii Strashko wrote:
Hi,
On 07/11/2013 09:32 AM, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [130710 09:18]:
On Wed, Jul 10, 2013 at 07:07:04PM +0300, Felipe Balbi wrote:
how about something like below ? It
* Olof Johansson o...@lixom.net [130712 20:16]:
On Fri, Jul 12, 2013 at 7:31 PM, Olof Johansson o...@lixom.net wrote:
This is pretty painful, and I don't know if we want to rethink Arnd's
patch since it will break existing defconfigs out there that rely on
OMAP2PLUS enabling the socs
Author: Tony Lindgren t...@atomide.com
Date: Mon Jul 15 00:39:41 2013 -0700
ARM: multi_v7: Enabled omap4430 sdp nfsroot
By adding support for OCP2SCP, SPI and KS8851 I can also boot test
multi_v7_defconfig easily.
Note that if using an older u-boot,
On 07/12/2013 01:52 PM, Stefan Roese wrote:
Roger,
On 07/12/2013 11:15 AM, Roger Quadros wrote:
Good idea. I'm currently using a dirty local version. I'll try to
switch to an officially available version tomorrow. And send you the
version/git id.
I updated my U-Boot to the following
On 07/14/2013 04:22 PM, Kevin Hilman wrote:
On 07/10/2013 05:23 PM, Roger Quadros wrote:
In order to support wake up from suspend use the pinctrl
framework to put the USB host pins in IDLE state during suspend.
CC: Samuel Ortiz sa...@linux.intel.com
Signed-off-by: Roger Quadros rog...@ti.com
On 07/15/2013 10:16 AM, Roger Quadros wrote:
I can only test on beagle-xm (which is also rev. C2) with integrated SMSC
ethernet chip
as I don't have an external USB-ethernet adapter.
Too bad. This difference in boards makes the tests a bit less
meaningful. Is there really no USB-ethernet
On Tuesday 09 July 2013 05:06 PM, Tony Lindgren wrote:
+/* dma_system */
+static struct omap_hwmod_irq_info dra7xx_dma_system_irqs[] = {
+ { .name = 0, .irq = 12 + DRA7XX_IRQ_GIC_START },
+ { .name = 1, .irq = 13 + DRA7XX_IRQ_GIC_START },
+ { .name = 2, .irq = 14 +
On Fri, Jul 12, 2013 at 07:14:41PM +0300, Felipe Balbi wrote:
Without this node, there will be no palmas
driver to notify dwc3 that a cable has
been connected and, without that, dwc3
will never initialize.
Signed-off-by: Felipe Balbi ba...@ti.com
---
after this, all we need is wait
On Monday 15 July 2013 12:14 PM, Rajendra Nayak wrote:
On Friday 12 July 2013 06:10 AM, Suman Anna wrote:
On 07/11/2013 04:59 AM, Grygorii Strashko wrote:
Hi,
On 07/11/2013 09:32 AM, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [130710 09:18]:
On Wed, Jul 10, 2013 at 07:07:04PM +0300,
Hello Lars-Peter,
Thank you for the review.
diff --git a/drivers/iio/adc/twl6030-gpadc.c
b/drivers/iio/adc/twl6030-gpadc.c
new file mode 100644
index 000..6ceb789
--- /dev/null
+++ b/drivers/iio/adc/twl6030-gpadc.c
@@ -0,0 +1,1019 @@
[...]
+static u8 twl6032_channel_to_reg(int
On 07/15/2013 01:09 PM, Kozaruk, Oleksandr wrote:
[...]
+ ret = devm_request_threaded_irq(dev, irq, NULL,
+ twl6030_gpadc_irq_handler,
+ IRQF_ONESHOT, twl6030_gpadc, gpadc);
You access memory in the interrupt
Hi All,
I have a question regarding this patch and IIO in general
- Does IIO provide sync mechanism with system wide suspend/resume or
this should be handled by each driver itself?
What if during system suspend iio_read_channel_raw() (or any other
consumer API) will be called after gpadc
On 07/15/2013 01:56 PM, Grygorii Strashko wrote:
Hi All,
I have a question regarding this patch and IIO in general
- Does IIO provide sync mechanism with system wide suspend/resume or this
should be handled by each driver itself?
What if during system suspend iio_read_channel_raw() (or
On 7/13/2013 12:55 AM, Mark Jackson wrote:
On 12/07/13 19:35, Mugunthan V N wrote:
On 7/12/2013 7:27 PM, Mark Jackson wrote:
[snip]
Just to update this (old) thread ...
I can still confirm that *without* the above patch, I am *unable* to use
both network
ports on our AM335x board.
Hi Benoit,
On 06/20/2013 05:11 PM, Cousson, Benoit wrote:
Thanks Roger,
I'll take them for 3.12. I was already late for my 3.11 pull request.
Please disregard these patches. I'll send a new version based on the reset-gpio
driver.
cheers,
-roger
--
To unsubscribe from this list: send the
On Mon, Jul 15, 2013 at 12:58:17AM -0700, Tony Lindgren wrote:
Author: Tony Lindgren t...@atomide.com
Date: Mon Jul 15 00:39:41 2013 -0700
ARM: multi_v7: Enabled omap4430 sdp nfsroot
By adding support for OCP2SCP, SPI and KS8851 I can also boot test
multi_v7_defconfig
Hello Jonathan,
Thanks for the review.
Couple of things:
1) It looks from the driver that a lot of the channels are not measuring
voltages but rather temperature or currents etc. If so then their
types in the channel mask should be appropriately set. Also if some
of the channels are entirely
On 15/07/13 14:30, Kozaruk, Oleksandr wrote:
Hello Jonathan,
Thanks for the review.
Couple of things:
1) It looks from the driver that a lot of the channels are not measuring
voltages but rather temperature or currents etc. If so then their
types in the channel mask should be
Hi Tony,
On 06/18/2013 07:04 PM, Roger Quadros wrote:
Till the OMAP clocks are correctly defined in device tree, use
this temporary hack to provide clock alias to the USB PHY clocks.
Without this, USB Host Ethernet will not be functional with
device tree boots on Panda and uEVM.
Looks
chip-ecc.hwctl() is used for preparing the H/W controller before read/write
NAND accesses (like assigning data-buf, enabling ECC scheme configs, etc.)
Though all ECC schemes in OMAP NAND driver use GPMC controller for generating
ECC syndrome (for both Read/Write accesses). But but in current code
ELM H/W engine is used by BCHx_ECC schemes for detecting and locating bit-flips.
However, ELM H/W engine has some constrains like:
- ELM can decode errors in chunks of 512 data bytes only
- ELM can operate max upto 8 such buffers in parallel
This patch
- add checks for above constrains
- fixes
chip-ecc.calculate() is used for calculating and fetching of ECC syndrome by
processing the data passed during Read/Write accesses.
All H/W based ECC schemes supported in omap2-nand driver use GPMC controller
to calculate ECC syndrome. But each BCHx_ECC scheme implements its own function
to
chip-ecc.correct() is used for detecting and correcting bit-flips during read
operations. In omap2-nand driver this is done usingt following functions:
- omap_correct_data(): for H/W based HAM1_ECC schemes
(Un-Touched in current patch)
- omap_elm_correct_data(): for H/W based BCHx_ECC
This patch series builds the base for adding support for newer H/W based ECC
schemes for NAND flash. This patch cleans-up redundant code among various
ECC schemes and improves scalability and readability.
This patch affects following data-paths:
[PATCH 1/5] NAND chip-ecc.correct(): Detects and
This patch just clean-up the code and fixes spaces in omap_nand_probe()
s/info-nand./chip-
s/info-mtd/mtd
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/nand/omap2.c | 210 +++
1 file changed, 102 insertions(+), 108 deletions(-)
diff --git
Did a grep for coordiante and replaced them all
with coordinate.
This applies to the mfd-next tree.
Signed-off-by: Zubair Lutfullah zubair.lutful...@gmail.com
---
.../bindings/input/touchscreen/ti-tsc-adc.txt |4 ++--
arch/arm/boot/dts/am335x-evm.dts |2 +-
From: Benoit Cousson benoit.cous...@linaro.org
without that hwmod data, USB3 will not in OMAP5 boards.
While at that, also fix DTS data to pass reg property,
otherwise driver won't probe.
Signed-off-by: Benoit Cousson benoit.cous...@linaro.org
Signed-off-by: Felipe Balbi ba...@ti.com
---
Without this node, there will be no palmas
driver to notify dwc3 that a cable has
been connected and, without that, dwc3
will never initialize.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/boot/dts/omap5-uevm.dts | 10 ++
arch/arm/boot/dts/omap5.dtsi | 2 +-
2 files
USB3 block has a 64KiB space, another 64KiB is
used for the wrapper.
Without this change, resource_size() will get
confused and driver won't probe because size
will be negative.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/boot/dts/omap5.dtsi | 4 ++--
1 file changed, 2 insertions(+),
DWC3 enables USB3 functionality for OMAP5 boards,
it's safe to enable those drivers in omap2plus_defconfig.
Signed-off-by: Felipe Balbi ba...@ti.com
---
arch/arm/configs/omap2plus_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
Hi,
I have just tested all these patches on OMAP5 uEVM and it's
working fine.
| [1141397.137900] usb 10-2: USB disconnect, device number 3
| [1142023.549485] usb 10-2: new SuperSpeed USB device number 4 using xhci_hcd
| [1142024.185535] usb 10-2: Parent hub missing LPM exit latency info. Power
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Acked-by: Felipe Balbi ba...@ti.com
Acked-by: Chanwoo Choi
Hi,
On Monday 15 July 2013 09:03 PM, Felipe Balbi wrote:
From: Benoit Cousson benoit.cous...@linaro.org
without that hwmod data, USB3 will not in OMAP5 boards.
While at that, also fix DTS data to pass reg property,
otherwise driver won't probe.
Signed-off-by: Benoit Cousson
On Mon, Jul 15, 2013 at 09:13:32PM +0530, Kishon Vijay Abraham I wrote:
Hi,
On Monday 15 July 2013 09:03 PM, Felipe Balbi wrote:
From: Benoit Cousson benoit.cous...@linaro.org
without that hwmod data, USB3 will not in OMAP5 boards.
While at that, also fix DTS data to pass reg
On 15/07/13 13:45, Mugunthan V N wrote:
On 7/13/2013 12:55 AM, Mark Jackson wrote:
On 12/07/13 19:35, Mugunthan V N wrote:
On 7/12/2013 7:27 PM, Mark Jackson wrote:
[snip]
Just to update this (old) thread ...
I can still confirm that *without* the above patch, I am *unable* to use
both
On Mon, Jul 15, 2013 at 09:09:02PM +0530, Kishon Vijay Abraham I wrote:
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
From: Mark Brown broo...@linaro.org
The DT platforms don't have any source dependency on any OMAP stuff so
allow them to be built when COMPILE_TEST is enabled.
Signed-off-by: Mark Brown broo...@linaro.org
---
sound/soc/omap/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Hi,
On Mon, Jul 15, 2013 at 04:57:56PM +0100, Mark Brown wrote:
@@ -26,7 +26,7 @@ config SND_OMAP_SOC_N810
config SND_OMAP_SOC_RX51
tristate SoC Audio support for Nokia RX-51
- depends on SND_OMAP_SOC MACH_NOKIA_RX51
+ depends on SND_OMAP_SOC (MACH_NOKIA_RX51 ||
On Mon, Jul 15, 2013 at 07:00:45PM +0300, Felipe Balbi wrote:
On Mon, Jul 15, 2013 at 04:57:56PM +0100, Mark Brown wrote:
@@ -26,7 +26,7 @@ config SND_OMAP_SOC_N810
config SND_OMAP_SOC_RX51
tristate SoC Audio support for Nokia RX-51
- depends on SND_OMAP_SOC MACH_NOKIA_RX51
+
On Mon, Jul 15, 2013 at 05:26:05PM +0100, Mark Brown wrote:
On Mon, Jul 15, 2013 at 07:00:45PM +0300, Felipe Balbi wrote:
On Mon, Jul 15, 2013 at 04:57:56PM +0100, Mark Brown wrote:
@@ -26,7 +26,7 @@ config SND_OMAP_SOC_N810
config SND_OMAP_SOC_RX51
tristate SoC Audio support for
Hi Mark,
On 07/15/2013 05:57 PM, Mark Brown wrote:
From: Mark Brown broo...@linaro.org
The DT platforms don't have any source dependency on any OMAP stuff so
allow them to be built when COMPILE_TEST is enabled.
The OMAP3 generic machine driver could be also included in this patch:
On Mon, Jul 15, 2013 at 06:43:46PM +0200, Peter Ujfalusi wrote:
On 07/15/2013 05:57 PM, Mark Brown wrote:
From: Mark Brown broo...@linaro.org
The DT platforms don't have any source dependency on any OMAP stuff so
allow them to be built when COMPILE_TEST is enabled.
The OMAP3 generic
On 7/15/2013 9:20 PM, Mark Jackson wrote:
On 15/07/13 13:45, Mugunthan V N wrote:
On 7/13/2013 12:55 AM, Mark Jackson wrote:
On 12/07/13 19:35, Mugunthan V N wrote:
On 7/12/2013 7:27 PM, Mark Jackson wrote:
[snip]
Just to update this (old) thread ...
I can still confirm that *without* the
On Fri, Jul 05, 2013 at 09:35:05AM -0500, Ruchika Kharwar wrote:
On 07/04/2013 01:26 AM, Ruchika Kharwar wrote:
DRA7XX has several USB OTG subsystems. USB_OTG_SS1 includes a USB1 and USB2
phy. USB_OTG_SS2 includes only a USB2 phy.
This patch allows the dwc3 probe to continue if a usb3_phy is
On 07/15/2013 05:01 AM, Rajendra Nayak wrote:
On Monday 15 July 2013 12:14 PM, Rajendra Nayak wrote:
On Friday 12 July 2013 06:10 AM, Suman Anna wrote:
On 07/11/2013 04:59 AM, Grygorii Strashko wrote:
Hi,
On 07/11/2013 09:32 AM, Tony Lindgren wrote:
* Felipe Balbi ba...@ti.com [130710
Hi,
I think USB tree introduced regressions in v3.11-rc1, at least for some
OMAP devices using legacy boot. I have only bisected these; I have no
idea what the real fixes are but the following reverts make Nokia OMAP2+
boards again usable for kernel development work (they need working USB
On 07/16/2013 12:51 AM, Felipe Balbi wrote:
On Mon, Jul 15, 2013 at 09:09:02PM +0530, Kishon Vijay Abraham I wrote:
Modified dwc3-omap to receive connect and disconnect notification using
extcon framework. Also did the necessary cleanups required after
adapting to extcon framework.
Hi Stephen,
On Friday 12 July 2013 08:42:41 Stephen Warren wrote:
On 07/12/2013 05:01 AM, Laurent Pinchart wrote:
On Thursday 11 July 2013 14:06:44 Stephen Warren wrote:
On 07/11/2013 01:32 PM, Thierry Reding wrote:
On Thu, Jul 11, 2013 at 11:50:48AM -0600, Stephen Warren wrote:
On
Hello,
On Friday 12 July 2013 11:40:44 Stephen Warren wrote:
On 07/12/2013 11:24 AM, Thierry Reding wrote:
On Fri, Jul 12, 2013 at 08:40:07AM -0600, Stephen Warren wrote:
On 07/12/2013 04:41 AM, Laurent Pinchart wrote:
Hi Stephen,
[...]
What about splitting it in three patches
On 07/15/2013 07:10 PM, Laurent Pinchart wrote:
On Friday 12 July 2013 08:42:41 Stephen Warren wrote:
...
I think the values for any common system-wide flags should be defined
once in some system-wide place, and the values for any HW-specific
values should be defined only in the documentation
On Sunday 14 July 2013 05:37 PM, Kevin Hilman wrote:
On 07/09/2013 08:27 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
DRA7xx has 8 GPIO banks so that there are 32x8 = 256 GPIOs.
In order for the gpiolib to detect and initialize these
additional GPIOs and other TWL GPIOs,
Tony,
On Monday 08 July 2013 04:44 PM, Kishon Vijay Abraham I wrote:
This series fixes the USB enumeration issue caused because of the controller
not able to get a reference to the PHY because of incorrect binding in the
board file.
In the case of non-dt boot, the platform specific
52 matches
Mail list logo
