On Monday 05 August 2013 10:38 AM, Afzal Mohammed wrote:
Hi Muguthan,
On Saturday 03 August 2013 05:19 PM, Mugunthan V N wrote:
On 8/2/2013 7:16 PM, Afzal Mohammed wrote:
+mac: ethernet@4a10 {
+compatible = ti,am4372-cpsw,ti,cpsw;
compatibility ti,am4372-cpsw is
Hello,
On Tuesday 23 July 2013 12:01:39 Tomi Valkeinen wrote:
On 13/07/13 21:27, Pavel Machek wrote:
On Wed 2013-07-10 15:08:59, Pali Rohár wrote:
* On RX-51 probing for acx565akm driver is later then for
omapfb which cause that omapfb probe fail and framebuffer
is not working *
Here is new version (v3) of omap secure part patch:
Other secure functions omap_smc1() and omap_smc2() calling instruction smc #0
but Nokia RX-51 board needs to call smc #1 for PPA access.
Signed-off-by: Ivaylo Dimitrov freemangor...@abv.bg
Signed-off-by: Pali Rohár pali.ro...@gmail.com
---
diff
* Tero Kristo t-kri...@ti.com [130802 09:33]:
clk-44xx.c now contains the clock init functionality for omap4, including
DT clock registration and adding of static clkdev entries.
Few comments below from boot new hardware with old kernels point of
view that seems to be pretty close for clocks.
On 08/02/2013 06:02 PM, George Cherian wrote:
On 8/1/2013 8:28 PM, Roger Quadros wrote:
Add nodes for the Super Speed USB controllers, omap-control-usb,
USB2 PHY and USB3 PHY devices.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7.dtsi | 136
On 08/02/2013 06:04 PM, George Cherian wrote:
On 8/1/2013 8:28 PM, Roger Quadros wrote:
Add USB drv_vbus pinctrl information and USB mode
for the USB controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 22 ++
1 files changed,
Hi,
On 02/08/13 17:03, Archit Taneja wrote:
+struct vpdma_data_format vpdma_yuv_fmts[] = {
+ [VPDMA_DATA_FMT_Y444] = {
+ .data_type = DATA_TYPE_Y444,
+ .depth = 8,
+ },
This, and all the other tables, should probably be consts?
+static void
On 8/5/2013 1:25 PM, Roger Quadros wrote:
On 08/02/2013 06:04 PM, George Cherian wrote:
On 8/1/2013 8:28 PM, Roger Quadros wrote:
Add USB drv_vbus pinctrl information and USB mode
for the USB controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/boot/dts/dra7-evm.dts | 22
On 02/08/13 17:03, Archit Taneja wrote:
Create functions which the VPE driver can use to create a VPDMA descriptor and
add it to a VPDMA descriptor list. These functions take a pointer to an
existing
list, and append the configuration/data/control descriptor header to the list.
In the case
On 02/08/13 17:03, Archit Taneja wrote:
VPE is a block which consists of a single memory to memory path which can
perform chrominance up/down sampling, de-interlacing, scaling, and color space
conversion of raster or tiled YUV420 coplanar, YUV422 coplanar or YUV422
interleaved video formats.
From: Matus Ujhelyi ujhely...@gmail.com
Currently the cold reset was triggered. It happened due to oposite offsets
of cold/warm flags in PRM_RSTST and PRM_RSTCTRL registers.
Signed-off-by: Matus Ujhelyi ujhely...@gmail.com
---
arch/arm/mach-omap2/am33xx-restart.c |4 ++--
1 file changed, 2
On 08/05/2013 12:03 PM, George Cherian wrote:
On 8/5/2013 1:25 PM, Roger Quadros wrote:
On 08/02/2013 06:04 PM, George Cherian wrote:
On 8/1/2013 8:28 PM, Roger Quadros wrote:
Add USB drv_vbus pinctrl information and USB mode
for the USB controller.
Signed-off-by: Roger Quadros
On Monday 05 August 2013 01:43 PM, Tomi Valkeinen wrote:
Hi,
On 02/08/13 17:03, Archit Taneja wrote:
+struct vpdma_data_format vpdma_yuv_fmts[] = {
+ [VPDMA_DATA_FMT_Y444] = {
+ .data_type = DATA_TYPE_Y444,
+ .depth = 8,
+ },
This, and
On 08/04/2013 07:27 PM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
The DRA7xx is a high-performance, infotainment application device,
based on enhanced OMAP architecture integrated on a 28-nm technology.
Since DRA7 is a platform supported only using DT, the cpu detection
is
The new IP version has a minor changes and the offsets are same as the
previous version, so adding new IP version support in the driver.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
---
Changes from intial version
* changed the implementation to
On Monday 05 August 2013 02:41 PM, Tomi Valkeinen wrote:
On 02/08/13 17:03, Archit Taneja wrote:
Create functions which the VPE driver can use to create a VPDMA descriptor and
add it to a VPDMA descriptor list. These functions take a pointer to an existing
list, and append the
On 05/08/13 14:26, Archit Taneja wrote:
On Monday 05 August 2013 01:43 PM, Tomi Valkeinen wrote:
+/*
+ * submit a list of DMA descriptors to the VPE VPDMA, do not wait
for completion
+ */
+int vpdma_submit_descs(struct vpdma_data *vpdma, struct
vpdma_desc_list *list)
+{
+/* we always
On 05/08/13 15:05, Archit Taneja wrote:
On Monday 05 August 2013 02:41 PM, Tomi Valkeinen wrote:
There's quite a bit of code in these dump functions, and they are always
called. I'm sure getting that data is good for debugging, but I presume
they are quite useless for normal use. So I think
On Sun, Aug 04, 2013 at 10:45:00AM +0200, Pali Rohár wrote:
Here is new version (v3) of omap secure part patch:
Other secure functions omap_smc1() and omap_smc2() calling instruction smc #0
but Nokia RX-51 board needs to call smc #1 for PPA access.
Signed-off-by: Ivaylo Dimitrov
Use devm_kzalloc() to make cleanup paths simpler.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
drivers/char/hw_random/omap-rng.c |9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/char/hw_random/omap-rng.c
b/drivers/char/hw_random/omap-rng.c
index
The omap_init_rng() routine in devices.c only needs to be
called when there is no device tree present.
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-omap2/devices.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
module_platform_driver() makes the code simpler.
Using the macro in the driver.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
drivers/char/hw_random/omap-rng.c | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/drivers/char/hw_random/omap-rng.c
platform_set_drvdata() is called twice in driver probe.
Removing the duplicated call.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
drivers/char/hw_random/omap-rng.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/char/hw_random/omap-rng.c
b/drivers/char/hw_random/omap-rng.c
This patch series adds support for OMAP4 version of RNG module.
This module produce a 64 bit random number and also allows to
de tune FROs when repeated pattern is coming out of FROs.
This series also has few fixes for the driver.
Lokesh Vutla (6):
hwrng: OMAP: Use module_platform_driver macro
Add support for OMAP4 version of TRNG module
that is present on OMAP4, AM33xx and OMAP5 SoCs.
The modules have several differences including register
offsets, output size, triggering rng and how configuring
FROs. To handle these differences, a platform_data structure
is defined and contains
Add Device Tree suport to the omap-rng driver.
Currently, only support for OMAP2 and OMAP3 is
being added but support for OMAP4 and OMAP5 will
be added in a subsequent patch.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
drivers/char/hw_random/omap-rng.c | 12
1 file changed,
ping?
On Aug 1, 2013, at 7:27 PM, Chen Baozi baoz...@gmail.com wrote:
The denominator should be load from INCREMENTOR_DENUMERATOR_RELOAD_OFFSET
rather than INCREMENTER_NUMERATOR_OFFSET.
Signed-off-by: Chen Baozi baoz...@gmail.com
---
arch/arm/mach-omap2/timer.c | 2 +-
1 file changed, 1
ARM Performance Monitor Units are available on the sama5d3, add the support in
the dtsi.
Tested with perf and oprofile on the sama5d31ek.
Signed-off-by: Alexandre Belloni alexandre.bell...@free-electrons.com
---
arch/arm/boot/dts/sama5d3.dtsi | 5 +
1 file changed, 5 insertions(+)
diff
Rajendra Nayak rna...@ti.com writes:
Some hwmods which are marked with HWMOD_INIT_NO_IDLE are left in enabled
state post setup(). When a omap_device gets created for such hwmods
make sure the omap_device and pm_runtime states are also in sync for such
hwmods by doing a omap_device_enable()
The total_processed variable was being used to keep track of when
DMA is completed for a particular descriptor.
This doesn't work anymore, as the interrupt for completion can come
in much later than when the total_processed variable is updated to
reflect that all SG entries have been issues.
Splitting of MAX available slots into 2 sets of size MAX_NR_LS
requires to the MAX_NR_SG function to be even. We ensure the same
in prep function.
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/dma/edma.c
We'd now need a separate slot just for the channel and separate
ones for the 2 linked sets, so we make adjustments to allocate
an extra channel accordingly.
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
Useful for visualizing linking of PaRAM slots
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/common/edma.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index aa43c49..34d3fc9 100644
--- a/arch/arm/common/edma.c
+++
It is possible edma_execute is called even when all the SG
elements have been submitted for transmission, we add a check
for the same and avoid executing the rest of the function.
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c |3 +++
1 file changed, 3 insertions(+)
diff
Process SG-elements in batches of MAX_NR_SG if they are greater
than MAX_NR_SG. Due to this, at any given time only those many
slots will be used in the given channel no matter how long the
scatter list is. We keep track of how much has been written
inorder to process the next batch of elements in
Previously, such a dump function was used but it wasn't reading
from the PaRAM, rather just from a edmacc_param structure, we
add a helpful function for debugging that directly reads from
the PaRAM and gives the current state correctly (including links
and interrupt information).
Signed-off-by:
To prevent common programming errors, add a function to enable
interrupts correctly. Also keeps calling code more readable.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/common/edma.c | 15 +++
include/linux/platform_data/edma.h |1 +
2 files changed, 16
Changes are made here for configuring existing parameters to support
DMA'ing them out in batches as needed.
Also allocate as many as slots as needed by the SG list, but not more
than MAX_NR_SG. Then these slots will be reused accordingly.
For ex, if MAX_NR_SG=10, and number of SG entries is 40,
We certainly don't want error conditions to be cleared any other
place but the EDMA error handler, as this will make us 'forget'
about missed events we might need to know errors have occurred.
This fixes a race condition where the EMR was being cleared
by the transfer completion interrupt
Andrii Tseglytskyi andrii.tseglyts...@ti.com writes:
Hi Kevin,
Could you please take a look to the following patch series.
It consists of two patches, which are needed for proper
SmartReflex Interrupt handling.
Thanks.
It doesn't appear that these are regression fixes, so I'm queuing for
Here is a more improved approach for DMA support of SG lists of any length
in the EDMA DMA Engine driver.
In the previous approach [1] we depended on error interrupts to detect
missed events and manually retrigger them, however as discussed in [2],
there are concerns this can be trouble some for
Wei Yongjun weiyj...@gmail.com writes:
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun yongjun_...@trendmicro.com.cn
Acked-by: Nishanth Menon n...@ti.com
---
cc to linux-pm with Nishanth
With this series, this check is no longer required and
we shouldn't need to reject drivers DMA'ing more than the
MAX number of slots.
Signed-off-by: Joel Fernandes jo...@ti.com
---
drivers/dma/edma.c |6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/dma/edma.c
Here we implement splitting up of the total MAX number of slots
available for a channel into 2 cyclically linked sets. Transfer
completion Interrupts are enabled on both linked sets and respective
handler recycles them on completion to process the next linked set.
Both linked sets are cyclically
From: Mugunthan V N mugunthan...@ti.com
Date: Mon, 5 Aug 2013 17:30:05 +0530
The new IP version has a minor changes and the offsets are same as the
previous version, so adding new IP version support in the driver.
Signed-off-by: Mugunthan V N mugunthan...@ti.com
Reviewed-by: Felipe Balbi
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