Enable use of DT for DMM/Tiler.
Originally worked on by Andy Gross
Cc: Andy Gross
Cc: DRI Development
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
b/drivers
The DMM/Tiler block can used by omapdrm to allocate frame buffers. With the
removal of address and irq data from the omap4 hwmods, the probe of DMM driver
fails and omapdrm isn't able to utilize the DMM hardware.
Add DMM bindings for omap4 and omap5.
Changes in v3:
- Fix mistakes in documentation
Add Dynamic Memory Manager (DMM) bindings for OMAP4 and OMAP5 devices. DMM
only requires address and irq information.
Add documentation for the DMM bindings.
Originally worked on by Andy Gross
Cc: Andy Gross
Signed-off-by: Archit Taneja
---
Documentation/devicetree/bindings/arm/omap/dmm.txt
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On 10/09/2013 06:24 PM, Nishanth Menon wrote:
> Call OMAP2+ generic lateinit hook from AM specific late init hook.
> This allows the generic late initializations such as cpufreq hooks
> to be active.
>
> Cc: Benoit Cousson
> Cc: Kevin Hilman
> Cc: Paul Walmsley
> Cc: Tony Lindgren
> Signed-off
On Tuesday 08 October 2013 11:45 PM, Tony Lindgren wrote:
> * Rajendra Nayak [131003 23:50]:
>> On Tuesday 01 October 2013 12:34 PM, Afzal Mohammed wrote:
>>> Hi Paul, Benoit, Tony,
>>>
>>> This series adds PRCM support (except clock tree) for AM43x SoC's.
>>> Please consider this for inclusion in
From: J Keerthy
Add DT OPP table for OMAP54xx family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
The data is based on OMAP543x ES2.0 DM Operating Condition Addendum
Version 0.6(April 2013)
NOTE: The voltage and frequency values work well only on NOM samples
OMAP443x, OMAP446x and OMAP447x platforms use dpll_mpu clock.
Add same to common definition.
Cc: Benoit Cousson
Signed-off-by: Nishanth Menon
---
arch/arm/boot/dts/omap4.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
From: J Keerthy
DRA7 platforms use dpll_mpu_ck clock for CPU. Add same to common
definition.
Cc: Benoit Cousson
[n...@ti.com: keep in sync with clock node changes]
Signed-off-by: Nishanth Menon
Signed-off-by: J Keerthy
---
arch/arm/boot/dts/dra7.dtsi |5 +
1 file changed, 5 insertion
Call OMAP2+ generic lateinit hook from DRA7 specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/mach-omap2/board-generic.c
OMAP34xx and OMAP36xx platforms use dpll1 clock. Add same to common
definition.
Cc: Benoit Cousson
Signed-off-by: Nishanth Menon
---
arch/arm/boot/dts/omap3.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 15370e9
On 10/09/2013 04:28 PM, Nishanth Menon wrote:
> Hi,
>
> The series is based on Tero's V8 of patches[1] - enables the use of
> cpufreq-cpu0 generic driver for all OMAP and related derivatives.
>
> I will stop copy pasting the series complete history and point at [2].
>
> Main changes since V5:
>
From: J Keerthy
OMAP5 platforms use dpll_mpu_ck clock for CPU. Add same to common
definition.
Cc: Benoit Cousson
[n...@ti.com: keep in sync with clock node changes]
Signed-off-by: Nishanth Menon
Signed-off-by: J Keerthy
---
arch/arm/boot/dts/omap5.dtsi |6 ++
1 file changed, 6 insert
From: J Keerthy
regulator smps123 supply from Palmas PMIC powers CPU0 on DRA7 EVM.
[n...@ti.com: rebase to latest]
Signed-off-by: Nishanth Menon
Signed-off-by: J Keerthy
---
arch/arm/boot/dts/dra7-evm.dts |4
arch/arm/boot/dts/dra7.dtsi|2 +-
2 files changed, 5 insertions(+),
regulator smps123 supply from Palmas PMIC powers CPU0 on OMAP5uEVM.
Based on a patch by J Keerthy
Signed-off-by: Nishanth Menon
---
arch/arm/boot/dts/omap5-uevm.dts |4
arch/arm/boot/dts/omap5.dtsi |2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/b
Call OMAP2+ generic lateinit hook from AM specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/mach-omap2/board-generic.c |
Call OMAP2+ generic lateinit hook from AM specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/mach-omap2/board-generic.c |
AM33XX based platforms use dpll_mpu clock. Add same to common dtsi
and remove the dummy clock node entry as AM33XX platform supports
only device tree based boot.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/boot/dts/am33xx
Call OMAP2+ generic lateinit hook from AM43x specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/mach-omap2/board-generic.c
With OMAP3+ and AM33xx supported SoC having defined CPU device tree
entries with operating-points and clock nodes defined, we can now use
the SoC generic cpufreq-cpu0 driver by registering appropriate device.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by
regulator smps123 supply from Palmas PMIC powers CPU0 on OMAP5uEVM.
Based on a patch by J Keerthy
Signed-off-by: Nishanth Menon
---
arch/arm/boot/dts/omap5-uevm.dts |4
arch/arm/boot/dts/omap5.dtsi |2 +-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/b
Call OMAP2+ generic lateinit hook from DRA7 specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/mach-omap2/board-generic.c
From: J Keerthy
Add DT OPP table for DRA7xx family of devices. This data is decoded by
OF with of_init_opp_table() helper function.
The data is based on DRA75x, DRA74x Data Manual revision F (Sept 2013).
TODO: add OPP_HIGH after AVS-Class0 is functional
NOTE: The voltage and frequency values wo
From: J Keerthy
regulator smps123 supply from Palmas PMIC powers CPU0 on DRA7 EVM.
[n...@ti.com: rebase to latest]
Signed-off-by: Nishanth Menon
Signed-off-by: J Keerthy
---
arch/arm/boot/dts/dra7-evm.dts |4
arch/arm/boot/dts/dra7.dtsi|2 +-
2 files changed, 5 insertions(+),
With OMAP3+ and AM33xx supported SoC having defined CPU device tree
entries with operating-points and clock nodes defined, we can now use
the SoC generic cpufreq-cpu0 driver by registering appropriate device.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by
Call OMAP2+ generic lateinit hook from AM specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/mach-omap2/board-generic.c |
From: J Keerthy
Add DT OPP table for OMAP54xx family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
The data is based on OMAP543x ES2.0 DM Operating Condition Addendum
Version 0.6(April 2013)
NOTE: The voltage and frequency values work well only on NOM samples
Call OMAP2+ generic lateinit hook from AM specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/mach-omap2/board-generic.c |
Call OMAP2+ generic lateinit hook from AM43x specific late init hook.
This allows the generic late initializations such as cpufreq hooks
to be active.
Cc: Benoit Cousson
Cc: Kevin Hilman
Cc: Paul Walmsley
Cc: Tony Lindgren
Signed-off-by: Nishanth Menon
---
arch/arm/mach-omap2/board-generic.c
On Thu, Oct 03, 2013 at 05:12:15AM +0100, Suman Anna wrote:
> Hi Mark,
>
> > On Fri, Sep 27, 2013 at 05:06:38PM +0100, Kumar Gala wrote:
> >>
> >> On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
> >>
> >>> HwSpinlock IP is present only on OMAP4 and other newer SoCs,
> >>> which are all device-tree
On Thu, Oct 03, 2013 at 05:04:15AM +0100, Suman Anna wrote:
> Hi Mark,
>
> On 10/01/2013 03:36 AM, Mark Rutland wrote:
> > Hi Suman,
> >
> > Apologies for replying to a subthread, due to an earlier mistake on my
> > part I don't have the original to hand.
>
> No issues, thanks for your review.
>
OMAP3+ supports both device tree and non-device tree boot.
Device tree bindings for OMAP3+ is supposed to be added via dts following:
Documentation/devicetree/bindings/power/opp.txt
Since we now have device tree entries for OMAP3+ cpu OPPs,
The current code wrongly adds duplicate OPPs. So, dont re
Hi,
The series is based on Tero's V8 of patches[1] - enables the use of
cpufreq-cpu0 generic driver for all OMAP and related derivatives.
I will stop copy pasting the series complete history and point at [2].
Main changes since V5:
- no more clock driver as part of this series[3] - instead depen
* Kevin Hilman [131009 14:17]:
> On Wed, Oct 9, 2013 at 1:51 PM, Tony Lindgren wrote:
> > * Kevin Hilman [131009 13:50]:
> >>
> >> FWIW, my automated boot is doing only DT boots on all the OMAP
> >> platforms. However, it's only testing basic boot so far so there's not
> >> a whole lot of drive
Add Keyboard Matrix information to N900's DTS file.
This patch maps the keys exactly as the original
board code.
Signed-off-by: Sebastian Reichel
---
arch/arm/boot/dts/omap3-n900.dts | 55
1 file changed, 55 insertions(+)
diff --git a/arch/arm/boot/dts/o
Add device tree support for twl4030 keypad driver and update the
Documentation with twl4030 keypad device tree binding information.
This patch also adds a twl4030 keypad node to the twl4030.dtsi file,
so that board files can just add the keymap.
Tested on Nokia N900.
Signed-off-by: Sebastian Rei
On Wed, Oct 9, 2013 at 1:51 PM, Tony Lindgren wrote:
> * Kevin Hilman [131009 13:50]:
>>
>> FWIW, my automated boot is doing only DT boots on all the OMAP
>> platforms. However, it's only testing basic boot so far so there's not
>> a whole lot of driver testing yet (but it's coming soon.)
>
> OK
For communicating with driver is used gpio bitbanging because TD028 does
not have a standard compliant SPI interface. It is a 3-wire thing with
direction reversal.
Communication with display is used only during panel enable/disable so it's
not performance issue.
Signed-off-by: Marek Belisko
Sign
* Kevin Hilman [131009 13:50]:
>
> FWIW, my automated boot is doing only DT boots on all the OMAP
> platforms. However, it's only testing basic boot so far so there's not
> a whole lot of driver testing yet (but it's coming soon.)
OK cool. For omap3, off-idle with DT needs the pending
pinctrl-s
Tony Lindgren writes:
> The following changes since commit 15c03dd4859ab16f9212238f29dd315654aa94f6:
>
> Linux 3.12-rc3 (2013-09-29 15:02:38 -0700)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
> tags/fixes-against-v3.12-rc3-t
On 10/09/2013 09:12 AM, Joel Fernandes wrote:
> On 10/09/2013 02:38 AM, Daniel Mack wrote:
[..]
>> (And the 'v3' in the subject is really my bad, sorry - I only sent one
>> version of this patch ever).
>>
>> I can respin the patch on top of the proper driver once all the edma
>> bits have eventuall
* Paul Walmsley [131009 12:07]:
> Eh, one correction:
>
> On Wed, 9 Oct 2013, Paul Walmsley wrote:
>
> > We could easily wind up with kernels that won't boot at all when used
> > with newer DT data.
>
> This is a misstatement of the issue: the concern here is that newer
> kernels may not boot
* Paul Walmsley [131009 12:04]:
> On Mon, 7 Oct 2013, Tony Lindgren wrote:
>
> > And assuming Paul is OK with these patches in general.
>
> Actually, I have several concerns with this series, as you and I
> discussed. Some of us have been talking them over with other folks for
> the past few
On Mon, 7 Oct 2013, Tony Lindgren wrote:
> And assuming Paul is OK with these patches in general.
Actually, I have several concerns with this series, as you and I
discussed. Some of us have been talking them over with other folks for
the past few months to try to figure out what to do. Most o
Eh, one correction:
On Wed, 9 Oct 2013, Paul Walmsley wrote:
> We could easily wind up with kernels that won't boot at all when used
> with newer DT data.
This is a misstatement of the issue: the concern here is that newer
kernels may not boot at all with older DT data - which could easily be
On Monday 07 October 2013 09:55 PM, Balaji T K wrote:
> Add mmc2 dt node to dra7-evm board
> and model eMMC vcc as fixed regulator.
>
> Signed-off-by: Balaji T K
Acked-by: Sekhar Nori
Thanks,
Sekhar
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On Monday 07 October 2013 09:55 PM, Balaji T K wrote:
> Add mmc1 dt node to dra7-evm board.
> Input for ldo1 regulator is controlled by gpio 5 of pcf8575 chip (0x21)
> on i2c1 bus. When dt support for gpio-pcf857x is available, input supply
> will be modelled as cascaded regulator.
>
> Signed-off-
On Wed, Oct 09, 2013 at 03:05:08PM +0300, Illia Smyrnov wrote:
> This patch fixes MCSPI FIFO buffer support when transmit-and-receive
> (full duplex) mode is used. In this mode FIFO can be used for RX or
> for TX or for both directions. If FIFO used for both directions the buffer
> is split into tw
Hi Paul,
On 10/09/2013 12:35 AM, Paul Walmsley wrote:
> Hi
>
> On Thu, 3 Oct 2013, Suman Anna wrote:
>
>> The hwmod init sequence involves initializing and idling all the
>> hwmods during bootup. If a module class has sysconfig, the init
>> sequence utilizes the module register base for performi
On 10/09/2013 02:12 AM, Paul Walmsley wrote:
> On Tue, 17 Sep 2013, Suman Anna wrote:
>
>> Add the hwmod data for the spinlock IP in OMAP5 SoC.
>> This is needed to be able to enable the OMAP spinlock
>> support for OMAP5.
>>
>> Signed-off-by: Suman Anna
>
> Thanks, queued. You can omit this on
On Wednesday 09 October 2013 08:43 PM, Benoit Cousson wrote:
> Hi Rajendra,
>
> On 09/10/2013 12:11, Rajendra Nayak wrote:
>> On OMAP we have co-processor IPs, memory controllers,
>> GPIOs which control regulators and power switches to
>> PMIC, and SoC internal Bus IPs, some or most of which
>> sh
+ A couple of DT maintainers
On 09/10/2013 18:41, Rajendra Nayak wrote:
On Wednesday 09 October 2013 08:43 PM, Benoit Cousson wrote:
Hi Rajendra,
On 09/10/2013 12:11, Rajendra Nayak wrote:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches
From: Peter Ujfalusi
AM335x EVM-SK have only support for audio playback (stereo jack on the
board) via tlv320aic3106 codec connected to McASP1.
Enable the support for audio playback on the board:
- McASP1 configuration
- tlv320aic3106 configuration
- Machine driver.
Signed-off-by: Peter Ujfalusi
* Tero Kristo [131009 08:40]:
>
> Separate branches for the maintainers also available here:
>
> https://github.com/t-kristo/linux-pm.git
>
> Branch with DTS only data: 3.12-rc3-dt-clks-for-benoit
> - based on top of 3.12-rc3 with Benoit's latest for_3.13 merged in
>
> Branch with clock driver
clk-43xx.c now contains the clock init functionality for am43xx, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
drivers/clk/ti/Makefile |2 +-
drivers/clk/ti/clk-43xx.c | 120 +
This patch creates a unique node for each clock in the DRA7 power,
reset and clock manager (PRCM).
TODO: apll_pcie clock node is still a dummy in this version, and
proper support for the APLL should be added.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arc
AM35xx now uses the clock data from device tree. Most of the data is
shared with OMAP3xxx, but as there is some delta, a new base .dtsi
file is also created for the SoC.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/am3517-evm.dts|
clk-33xx.c now contains the clock init functionality for am33xx, including
DT clock registration and adding of static clkdev entries.
This patch also moves the omap2_clk_enable_init_clocks declaration to
the driver include, as this is needed by the am33xx clock init code.
Signed-off-by: Tero Kris
This patch creates a unique node for each clock in the AM43xx power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/am43xx-clocks.dtsi | 656 ++
1 file changed, 656 insertions(+
OMAP3 has interface clocks in addition to functional clocks, which
require special handling for the autoidle and idle status register
offsets mainly.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
.../devicetree/bindings/clock/ti/interface.txt | 54 +
If the main clock for a hwmod is of basic clock type, it is illegal to type
cast this to clk_hw_omap and will result in bogus data. Fixed by checking
the clock flags before attempting the type cast.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/mach-
From: J Keerthy
This patch changes apll_pcie_m2_ck to fixed factor
clock as there are no configurable divider associated to m2.
Signed-off-by: J Keerthy
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/dra7xx-clocks.dtsi |9 +++--
1
From: J Keerthy
The patch adds support for DRA7 PCIe APLL. The APLL
sources the optional functional clocks for PCIe module.
APLL stands for Analog PLL. This is different when comapred
with DPLL meaning Digital PLL, the phase detection is done
using an analog circuit.
Signed-off-by: J Keerthy
S
From: J Keerthy
The patch adds a mux node to choose the parent of apll_pcie_ck node.
Signed-off-by: J Keerthy
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/dra7xx-clocks.dtsi | 14 +++---
1 file changed, 11 insertions(+), 3 dele
OMAP3 platforms support both DT and non-DT boot at the moment, make
the clock init work according to the used setup.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/mach-omap2/io.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
AM33xx clocks have now been moved to DT, thus remove the old data file
and use the new init code under OMAP clock driver.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/mach-omap2/Makefile |1 -
arch/arm/mach-omap2/cclock33xx_data.c | 106
Clock tree data is now included from base am4372.dtsi file.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/am4372.dtsi |7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
From: J Keerthy
This patch adds optfclk_pciephy_clk and optfclk_pciephy_div_clk
which are used by PCIe phy. It also adds a mux clock to choose
the source of optfclk_pciephy_div_clk clock.
Signed-off-by: J Keerthy
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
--
clk-3xxx.c now contains the clock init functionality for omap3, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/mach-omap2/clock3xxx.h |1 -
drivers/clk/ti/Makefile |2
clk-7xx.c now contains the clock init functionality for dra7, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
drivers/clk/ti/Makefile |1 +
drivers/clk/ti/clk-7xx.c | 334 +++
This patch creates a unique node for each clock in the AM33xx power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/am33xx-clocks.dtsi | 640 ++
arch/arm/boot/dts/am33xx.dtsi
Clock tree DT data is now included from base dra7.dtsi file.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/dra7.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.d
Initializes clock data from device tree.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/mach-omap2/io.c |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 3263022..ef04dd5 100644
--- a/arch
This patch creates a unique node for each clock in the OMAP5 power,
reset and clock manager (PRCM).
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/omap5.dtsi | 14 +
arch/arm/boot/dts/omap54xx-clocks.dtsi | 1327 ++
clk-54xx.c now contains the clock init functionality for omap5, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/mach-omap2/io.c |1 +
drivers/clk/ti/Makefile |1 +
drivers/
DT clocks are mostly missing clkdm info now, and this causes an issue with
counter32k which makes its slave idlemode wrong and prevents core idle.
Fixed by initializing the hwmod clkdm pointers for omap3 also which makes
sure the clkdm flag matching logic works properly.
This patch also changes t
This patch creates a unique node for each clock in the OMAP4 power,
reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly
different clock tree which is taken into account in the data.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/boot/d
This is a multipurpose clock node, which contains support for multiple
sub-clocks. Uses composite clock type to implement the actual functionality.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
.../devicetree/bindings/clock/ti/mux-gate.txt | 100 +++
This patch adds support for TI specific gate clocks. These behave as basic
gate-clock, but have different ops / hw-ops for controlling the actual
gate, for example waiting until the clock is ready. Several sub-types
are supported:
- ti,gate-clock: basic gate clock with default ops/hwops
- ti,clkdm-
From: Roger Quadros
USB_DPLL must be initialized and locked at boot so that
USB modules can work.
Signed-off-by: Roger Quadros
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
drivers/clk/ti/clk-54xx.c | 18 +-
1 file changed, 17 insertions(
clk-44xx.c now contains the clock init functionality for omap4, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
arch/arm/mach-omap2/clock.h |1 -
drivers/clk/ti/Makefile |1 +
driv
ti,mux-clock provides now a binding for basic mux support. This is just
using the basic clock type.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
Documentation/devicetree/bindings/clock/ti/mux.txt | 67
drivers/clk/ti/Makefile
The OMAP clock driver now supports DPLL clock type. This patch also
adds support for DT DPLL nodes.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
.../devicetree/bindings/clock/ti/dpll.txt | 83 +++
arch/arm/mach-omap2/clock.h
This behaves exactly in similar manner to basic fixed-factor-clock, but
adds a few properties on top for handling clock hardware autoidling.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
.../bindings/clock/ti/fixed-factor-clock.txt | 29 +
dri
Some devices require their clocks to be available with a specific
dev-id con-id mapping. With DT, the clocks can be found by default
only with their name, or alternatively through the device node of
the consumer. With drivers, that don't support DT fully yet, add
mechanism to register specific cloc
TI clk driver now routes some of the basic clocks through own
registration routine to allow autoidle support. This routine just
checks a couple of device node properties and adds autoidle support
if required, and just passes the registration forward to basic clocks.
Signed-off-by: Tero Kristo
Tes
Some OMAP clocks require knowledge about their parent clockdomain for
book keeping purposes. This patch creates a new DT binding for TI
clockdomains, which act as a collection of device clocks.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
.../devicetree/bind
This patch adds support for TI divider clock binding, which simply uses
the basic clock divider to provide the features needed.
Signed-off-by: Tero Kristo
Tested-by: Nishanth Menon
Acked-by: Tony Lindgren
---
.../devicetree/bindings/clock/ti/divider.txt | 87 +++
drivers/clk/ti
Hi all,
Version 8 has basically just some cosmetic changes + 2 functional ones.
Functional changes:
- patch #1: added support for am3-dpll-j-type-clock
- patch #20: added support for is_enabled op to APLL
- patch #34: fixed a typo in dpll_core_ck compatible string
Cosmetic fixes:
- new DT XXX_cl
Hi Rajendra,
On 09/10/2013 12:11, Rajendra Nayak wrote:
On OMAP we have co-processor IPs, memory controllers,
GPIOs which control regulators and power switches to
PMIC, and SoC internal Bus IPs, some or most of which
should either not be reset or idled or both at init.
(In some cases there are e
* Roger Quadros [131009 00:19]:
> Hi Tony,
>
> On 10/08/2013 01:06 PM, Roger Quadros wrote:
> > This reverts commit 741532c4a995be11815cb72d4d7a48f442a22fea.
> >
> > The proper clock reference is provided in device tree so we
> > no longer need this.
>
> Could you please Ack this one? I think i
* Linus Walleij [131009 06:51]:
> On Mon, Oct 7, 2013 at 7:35 PM, Tony Lindgren wrote:
>
> > Hi Linus W,
> >
> > Any comments on the pinctrl patches 3 - 5 in this series?
>
> Yes, after good explanations to my whimsical questions only this:
> Acked-by: Linus Walleij
OK thanks :)
> I guess y
On Thu, 29 Aug 2013, Lokesh Vutla wrote:
> Add RNG hwmod data for AM33xx SoC.
>
> Signed-off-by: Lokesh Vutla
Thanks, queued.
- Paul
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* Tomi Valkeinen [131009 02:35]:
> On 09/10/13 12:19, Javier Martinez Canillas wrote:
> > Now that display information and setup is made from dss-common
> > there is no need to have this code in the board file.
> >
> > Signed-off-by: Javier Martinez Canillas
> > ---
> >
> > Changes since v2:
>
On Wed, 9 Oct 2013, Rajendra Nayak wrote:
> Now that we have DT bindings to specify which devices should not
> be reset and idled during init, make hwmod extract the information
> (and store them in internal flags) from Device tree.
>
> Signed-off-by: Rajendra Nayak
Thanks, queued.
- Paul
--
T
On Wed, 9 Oct 2013, Rajendra Nayak wrote:
> For modules/IPs/hwmods which do not have
> -1- sys->class->reset()
> and
> -2- hardreset lines
> and
> -3- No way to do an ocp reset (no sysc control)
> the flag 'HWMOD_INIT_NO_RESET' is not much useful.
>
> Cleanup all such instances across various hwm
* Javier Martinez Canillas [131009 00:45]:
> On 10/09/2013 08:02 AM, Tomi Valkeinen wrote:
> > Hi Tony,
> >
> > On 09/10/13 00:11, Tony Lindgren wrote:
> >> * Javier Martinez Canillas [131004
> >> 20:00]:
> >>> IGEPv2 board has both an DVI and TFP410 video interfaces but
> >>> DSS support for D
From: Darren Etheridge
Adds sound, tlv320aic3106, mcasp1, and am335x_evm_audio_pin nodes.
Signed-off-by: Darren Etheridge
Signed-off-by: Peter Ujfalusi
Signed-off-by: Jyri Sarha
---
arch/arm/boot/dts/am335x-evm.dts | 51 ++
1 file changed, 51 insertions(
On 10/09/2013 01:18 AM, Gururaja Hebbar wrote:
> On Wednesday 09 October 2013 11:33 AM, Fernandes, Joel wrote:
>> Some temporary issues with my mua so forgive any artifacts in this email.
>>
>> On Oct 9, 2013, at 12:14 AM, "Hebbar, Gururaja"
>> wrote:
>>
>>> On Wednesday 09 October 2013 09:58 AM,
On 10/09/2013 02:38 AM, Daniel Mack wrote:
> Hi everyone,
>
> On 09.10.2013 08:18, Gururaja Hebbar wrote:
>> On Wednesday 09 October 2013 11:33 AM, Fernandes, Joel wrote:
>>> Some temporary issues with my mua so forgive any artifacts in this
>>> email.
>>>
>>> On Oct 9, 2013, at 12:14 AM, "Hebbar,
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