On 04/19/2014 12:52 PM, Aaro Koskinen wrote:
Hi,
On Mon, Apr 14, 2014 at 01:46:16PM +0200, Robert Baldyga wrote:
dev_info(pdev-dev,
- OMAP USB OTG controller rev %d.%d (%s, id=%d, vbus=%d)\n,
- (rev 4) 0xf, rev 0xf, config-extcon, otg_dev-id,
+
Tony,
From: Tony Lindgren
* Robert Nelson robertcnel...@gmail.com [140418 16:42]:
On Fri, Apr 18, 2014 at 5:51 PM, Tony Lindgren t...@atomide.com wrote:
* Robert Nelson robertcnel...@gmail.com [140415 08:46]:
Background: i also tried getting this having this fixed in u-boot:
Do we
Hi Tony,
On Tue, Apr 22, 2014 at 2:54 AM, Tony Lindgren t...@atomide.com wrote:
Hi all,
Here are two fixes to GPMC issues I've seen. It seems that we have
few more issues left to solve:
1. The remap of a device with gpmc_cs_remap seems to fail for
a device if it's address specified in
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64
(b) NAND Device
*changes v2 - v3*
rebased on git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
:master
merged leftover patches (dra7-evm and am43x-epos-evm fix) from Part-1 series
*changes v1 - v2*
[PATCH v2 1/2] created new DTS for memory-capes based on following feedbacks
Adds pinmux and DT node for Micron (MT29F4G08AB) x8 NAND device present on
am437x-gp-evm board.
(1) As NAND Flash data lines are muxed with eMMC, Thus at a given time either
eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled:
(a) By dynamically driving following
Hi Russ,
Am Donnerstag, 24. Oktober 2013, 10:09:12 schrieb Heiko Stübner:
Am Dienstag, 17. September 2013, 14:43:26 schrieb Russ Dill:
This patch adds support for and demonstrates the usage of an embedded
position independent executable (PIE). The goal is to allow the use of C
code in
L2 cache initialization for OMAP4 redundantly sets the
cache policy to Round-Robin. This is not needed since
thats the PL310 default anyway.
Removing this reduces the number of platform specific
aux control settings.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
Get rid of init call to initialize L2 cache.
Instead use the init_early machine hook. This
helps in using the initialization routine across
SoCs without the need of ugly cpu_is_*() checks.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/common.h |1 +
Add support for L2 cache controller (PL310) on
AM437x SoC.
Signed-off-by: Sekhar Nori nsek...@ti.com
---
arch/arm/mach-omap2/Kconfig |1 +
arch/arm/mach-omap2/io.c|1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index
This patch series adds L2 cache support for AM437x
and does some clean-ups for existing OMAP4 support
along the way (no functional changes). On OMAP4 Panda,
the Aux control value remains 0x7e47 before and
after the series.
Tested on OMAP4 Panda and AM437x EPOS EVMs.
It is based on RMK's 75
MTD NAND partition for file-system should start at offset=0xA0
Signed-off-by: Pekon Gupta pe...@ti.com
---
arch/arm/boot/dts/am43x-epos-evm.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts
b/arch/arm/boot/dts/am43x-epos-evm.dts
From: Minal Shah minalks...@gmail.com
DRA7xx platform has in-build GPMC and ELM h/w engines which can be used
for accessing externel NAND flash device. This patch:
- adds generic DT binding in dra7.dtsi for enabling GPMC and ELM h/w engines
- adds DT binding for Micron NAND Flash (MT29F2G16AADWP)
From: Yegor Yefremov yegorsli...@googlemail.com
This patch implements gpio_chip's get_direction() routine, that
lets other drivers get particular GPIOs direction using
struct gpio_desc.
Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
---
drivers/gpio/gpio-omap.c | 28
On 04/16/2014 07:14 AM, Lokesh Vutla wrote:
WDT1 module can take one of the below clocks as input functional
clock -
- On-Chip 32K RC Osc [default/reset]
- 32K from PRCM
The On-Chip 32K RC Osc clock is not an accurate clock-source as per
the design/spec, so as a result, for
Hello Yegor,
On Tue, Apr 22, 2014 at 11:23 AM, yegorsli...@googlemail.com wrote:
From: Yegor Yefremov yegorsli...@googlemail.com
This patch implements gpio_chip's get_direction() routine, that
lets other drivers get particular GPIOs direction using
struct gpio_desc.
Signed-off-by: Yegor
We need tblclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/boot/dts/am43xx-clocks.dtsi | 84 ++
drivers/clk/ti/clk-43xx.c
On Tue, Apr 8, 2014 at 8:20 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
So this is an RFC patch-set to add a virtual table to be used by
GPIO chip controllers and consist of the following patches:
Overall I like this.
However I don't want to see any transitional phase.
On Fri, Apr 11, 2014 at 1:47 AM, Tony Lindgren t...@atomide.com wrote:
Since we set up device wake-up interrupts as pinctrl-single
interrupts, we now must use the standard request_irq and
related functions to manage them.
If the pin interrupts are enabled for some pins at boot,
the wake-up
Hi Felipe,
Looks like we missed this one. Could you please pick this up for -rc?
Thanks.
cheers,
-roger
On 03/26/2014 11:43 AM, Roger Quadros wrote:
During system resume, if the event buffers are not setup before
the gadget controller starts then we start with invalid context
and this can
Hello Linus,
On Tue, Apr 22, 2014 at 1:36 PM, Linus Walleij linus.wall...@linaro.org wrote:
On Tue, Apr 8, 2014 at 8:20 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
So this is an RFC patch-set to add a virtual table to be used by
GPIO chip controllers and consist of
On 04/22/2014 01:25 PM, Sourav Poddar wrote:
We need tblclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in clock dts file.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
arch/arm/boot/dts/am43xx-clocks.dtsi | 84
On Fri, Apr 11, 2014 at 5:03 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
Hello Aaro,
On Thu, Apr 10, 2014 at 11:22 PM, Aaro Koskinen aaro.koski...@iki.fi wrote:
Hi,
On Thu, Apr 10, 2014 at 10:17:44PM +0200, Javier Martinez Canillas wrote:
The same happens also on Nokia 770:
On 10.03.2014 17:45, Richard Genoud wrote:
This patch add some helpers to control modem lines (CTS/RTS/DSR...) via
GPIO.
This will be useful for many boards which have a serial controller that
only handle CTS/RTS pins (or even just RX/TX).
Signed-off-by: Richard Genoud
On Thu, 2014-04-17 at 19:50 -0700, Tony Lindgren wrote:
vpll2 {
- /* Needed for DSS */
- regulator-name = vdds_dsi;
+ /* Needed for DSS */
+ regulator-name = vdds_dsi;
};
This vpll2 node shouldn't be needed with full DT solution.
Tomi
signature.asc
Description:
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http://slexy.org/raw/s2gh6XsLve
2: am3517-evm: Boot PASS: http://slexy.org/raw/s2MTkdzPnb
3: am37x-evm: Boot PASS: http://slexy.org/raw/s2SJwrVat8
4: am43xx-epos: Boot PASS: http://slexy.org/raw/s2184jfKlq
5: am43xx-gpevm: Boot
On Fri, 2014-04-18 at 18:43 +0200, Joachim Eastwood wrote:
If it does not make sense to set up a generic mode-gpios for the
panels, then panel dpi can parse the first two GPIOs for enable
and reset. Then we can allow the rest of the array be parsed if
needed based on the compatible flag.
On 04/22/2014 04:18 PM, Nishanth Menon wrote:
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http://slexy.org/raw/s2gh6XsLve
2: am3517-evm: Boot PASS: http://slexy.org/raw/s2MTkdzPnb
3: am37x-evm: Boot PASS: http://slexy.org/raw/s2SJwrVat8
4: am43xx-epos: Boot PASS: http
From: Yegor Yefremov yegorsli...@googlemail.com
This patch implements gpio_chip's get_direction() routine, that
lets other drivers get particular GPIOs direction using
struct gpio_desc.
Signed-off-by: Yegor Yefremov yegorsli...@googlemail.com
Acked-by: Javier Martinez Canillas
On Tue, Apr 22, 2014 at 12:24 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
Hello Yegor,
On Tue, Apr 22, 2014 at 11:23 AM, yegorsli...@googlemail.com wrote:
From: Yegor Yefremov yegorsli...@googlemail.com
This patch implements gpio_chip's get_direction() routine, that
lets other
* Gupta, Pekon pe...@ti.com [140421 23:49]:
Tony,
From: Tony Lindgren
* Robert Nelson robertcnel...@gmail.com [140418 16:42]:
On Fri, Apr 18, 2014 at 5:51 PM, Tony Lindgren t...@atomide.com wrote:
* Robert Nelson robertcnel...@gmail.com [140415 08:46]:
Background: i also tried
On Tuesday 22 April 2014, Javier Martinez Canillas wrote:
Hello Linus,
On Tue, Apr 22, 2014 at 1:36 PM, Linus Walleij linus.wall...@linaro.org
wrote:
On Tue, Apr 8, 2014 at 8:20 PM, Javier Martinez Canillas
javier.marti...@collabora.co.uk wrote:
So this is an RFC patch-set to add a
Hi Leigh,
On 16/04/2014 13:26, Leigh Brown wrote:
In ARM: dts: am33xx: correcting dt node unit address for usb, the
usb_ctrl_mod and cppi41dma nodes were updated with the correct register
addresses. However, the dts files that reference these nodes were not
updated, and those devices are no
Hi,
On Thu, Mar 20, 2014 at 02:29:57PM -0500, Felipe Balbi wrote:
per CodingStyle we should have those braces, no
functional changes.
Signed-off-by: Felipe Balbi ba...@ti.com
Greg, do you want me to refresh and resend this series ?
--
balbi
signature.asc
Description: Digital signature
Hi,
On Tue, Apr 22, 2014 at 03:24:44PM +0300, Roger Quadros wrote:
Looks like we missed this one. Could you please pick this up for -rc?
see http://marc.info/?l=linux-usbm=139809466025568w=2 , it's already
there
--
balbi
signature.asc
Description: Digital signature
On Tue, Apr 22, 2014 at 08:21:35AM +0200, Robert Baldyga wrote:
On 04/19/2014 12:52 PM, Aaro Koskinen wrote:
Hi,
On Mon, Apr 14, 2014 at 01:46:16PM +0200, Robert Baldyga wrote:
dev_info(pdev-dev,
- OMAP USB OTG controller rev %d.%d (%s, id=%d, vbus=%d)\n,
-
Hi,
On Tue, Apr 22, 2014 at 08:21:35AM +0200, Robert Baldyga wrote:
On 04/19/2014 12:52 PM, Aaro Koskinen wrote:
On Mon, Apr 14, 2014 at 01:46:16PM +0200, Robert Baldyga wrote:
dev_info(pdev-dev,
- OMAP USB OTG controller rev %d.%d (%s, id=%d, vbus=%d)\n,
- (rev
Logs with with DEBUG_LL and early printk below:
Thread: http://marc.info/?t=139817273800014r=1w=2
On 04/22/2014 08:18 AM, Nishanth Menon wrote:
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http://slexy.org/raw/s2gh6XsLve
2: am3517-evm: Boot PASS: http://slexy.org/raw
* Javier Martinez Canillas jav...@dowhile0.org [140421 23:55]:
On Tue, Apr 22, 2014 at 2:54 AM, Tony Lindgren t...@atomide.com wrote:
2. There seems to be some timing issues with smc911x where
rsync of larger files and apt-get dist-upgrade can produce
strange errors. This seems to
On Monday 21 April 2014 11:02 PM, Felipe Balbi wrote:
Hi,
On Wed, Mar 26, 2014 at 07:04:45PM -0500, Felipe Balbi wrote:
this series lets us access the newer registers introduced
back in OMAP4 which give us some valid information about
the OMAP HSMMC IP like max block size, support for ADMA,
Hi,
On Tue, Apr 22, 2014 at 09:00:12PM +0530, Balaji T K wrote:
On Monday 21 April 2014 11:02 PM, Felipe Balbi wrote:
Hi,
On Wed, Mar 26, 2014 at 07:04:45PM -0500, Felipe Balbi wrote:
this series lets us access the newer registers introduced
back in OMAP4 which give us some valid
Hello Peter and Nishanth,
On Tue, Apr 22, 2014 at 3:29 PM, Peter Ujfalusi peter.ujfal...@ti.com wrote:
On 04/22/2014 04:18 PM, Nishanth Menon wrote:
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http://slexy.org/raw/s2gh6XsLve
2: am3517-evm: Boot PASS: http://slexy.org/raw
* Linus Walleij linus.wall...@linaro.org [140422 04:55]:
On Fri, Apr 11, 2014 at 1:47 AM, Tony Lindgren t...@atomide.com wrote:
Since we set up device wake-up interrupts as pinctrl-single
interrupts, we now must use the standard request_irq and
related functions to manage them.
If the
On Mon, Apr 14, 2014 at 02:41:55PM +0300, Peter Ujfalusi wrote:
Hi,
Changes since v2:
- Dropped patch 10 from v2 (simplify direction configuration...)
- Dropped the channel priority related patches since we are going to go via
different route for configuring the priority.
- Added ACK
On Fri, Apr 18, 2014 at 09:50:33PM -0500, Joel Fernandes wrote:
We add DMA memcpy support to EDMA driver. Successful tests performed using
dmatest kernel module. Copy alignment is set to DMA_SLAVE_BUSWIDTH_4_BYTES and
users must ensure length is aligned so that copy is performed fully.
On Fri, Apr 18, 2014 at 11:34:50AM -0500, Joel Fernandes wrote:
On 04/18/2014 03:50 AM, Russell King - ARM Linux wrote:
On Thu, Apr 17, 2014 at 07:56:50PM -0500, Joel Fernandes wrote:
Free the vd (virt descriptor) after the callback is called. In EDMA driver
atleast which uses virt-dma, we
On Tuesday 22 April 2014 04:28 AM, Sekhar Nori wrote:
This patch series adds L2 cache support for AM437x
and does some clean-ups for existing OMAP4 support
along the way (no functional changes). On OMAP4 Panda,
the Aux control value remains 0x7e47 before and
after the series.
Tested on
On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
(Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
seems to be because the CPU is in ARM mode once the ROM hands over control to
the kernel. Switch to THUMB mode if required once the kernel is
On Tuesday 22 April 2014 02:31 PM, Joel Fernandes wrote:
On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
(Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
seems to be because the CPU is in ARM mode once the ROM hands over control to
the
Signed-off-by: Geert Uytterhoeven geert+rene...@glider.be
Cc: Benoit Cousson bcous...@baylibre.com
Cc: Srinivas Kandagatla srinivas.kandaga...@st.com
Cc: linux-omap@vger.kernel.org
Cc: ker...@stlinux.com
Cc: linux-arm-ker...@lists.infradead.org
---
arch/arm/boot/dts/am33xx.dtsi |4
On Tue, Apr 22, 2014 at 1:31 PM, Joel Fernandes jo...@ti.com wrote:
On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
Did you mean THUMB2? omap2plus_defconfig works today with
CONFIG_ARM_THUMB enabled..
(Cortex A15) fails to come up causing SMP boot on second CPU to
This patch, along with patch here [1], fixes boot for am437x-gp-evm. The
bootloader configures gpio5_7 to control the DDR3 termination regulator,
the linked patch prevents that gpio bank from being reset and losing
the previously configured state, and this patch binds the gpio to a
regulator so
The VTT regulator for DDR3 termination on the am437x-gp-evm is
controlled by a gpio. It is configured by the bootloader so here we
define an always-on, fixed voltage regulator to hold the gpio.
Signed-off-by: Dave Gerlach d-gerl...@ti.com
---
arch/arm/boot/dts/am437x-gp-evm.dts | 11 +++
On 04/22/2014 01:52 PM, Dave Gerlach wrote:
The VTT regulator for DDR3 termination on the am437x-gp-evm is
controlled by a gpio. It is configured by the bootloader so here we
define an always-on, fixed voltage regulator to hold the gpio.
Signed-off-by: Dave Gerlach d-gerl...@ti.com
---
* Dave Gerlach d-gerl...@ti.com [140422 11:52]:
This patch, along with patch here [1], fixes boot for am437x-gp-evm. The
bootloader configures gpio5_7 to control the DDR3 termination regulator,
the linked patch prevents that gpio bank from being reset and losing
the previously configured
On Apr 22, Javier Martinez Canillas wrote:
On Tue, Apr 22, 2014 at 3:29 PM, Peter Ujfalusi peter.ujfal...@ti.com wrote:
On 04/22/2014 04:18 PM, Nishanth Menon wrote:
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http://slexy.org/raw/s2gh6XsLve
2: am3517-evm: Boot PASS
On my DRA7 system, when the kernel is built in Thumb-2 mode, the secondary CPU
(Cortex A15) fails to come up causing SMP boot on second CPU to timeout. This
seems to be because the CPU is in ARM mode once the ROM hands over control to
the kernel. Switch to Thumb-2 mode if required once the kernel
On 04/22/2014 01:47 PM, Nishanth Menon wrote:
On Tue, Apr 22, 2014 at 1:31 PM, Joel Fernandes jo...@ti.com wrote:
On my DRA7 system, when the kernel is built in THUMB mode, the secondary CPU
Did you mean THUMB2? omap2plus_defconfig works today with
CONFIG_ARM_THUMB enabled..
ARM_THUMB is for
On Mon, Apr 14, 2014 at 01:46:12PM +0200, Robert Baldyga wrote:
That's quite some CC list you've got there, and the mail seems a bit
corrupted too (it confused my MUA).
This patch adds extcon devicetree bindings. Documentation describes in general
client and provider bindings, and contains
On 04/22/2014 02:01 PM, Tony Lindgren wrote:
* Dave Gerlach d-gerl...@ti.com [140422 11:52]:
This patch, along with patch here [1], fixes boot for am437x-gp-evm. The
bootloader configures gpio5_7 to control the DDR3 termination regulator,
the linked patch prevents that gpio bank from being
On 04/22/2014 01:58 PM, Nishanth Menon wrote:
On 04/22/2014 01:52 PM, Dave Gerlach wrote:
The VTT regulator for DDR3 termination on the am437x-gp-evm is
controlled by a gpio. It is configured by the bootloader so here we
define an always-on, fixed voltage regulator to hold the gpio.
Add the necessary nodes to enable the LCD controller and the
LCD panel that is attached to the Texas Instruments AM335x
EVMSK platform. Also setup the necessary pin mux within the
DT file to drive the LCD connector and add the correct
pinmux settings for the lcd pins to be configured to when
the
On 04/22/2014 10:13 AM, Nishanth Menon wrote:
Logs with with DEBUG_LL and early printk below:
Thread: http://marc.info/?t=139817273800014r=1w=2
On 04/22/2014 08:18 AM, Nishanth Menon wrote:
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http://slexy.org/raw/s2gh6XsLve
2
On Tue, Apr 22, 2014 at 5:52 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
I've revised the patch again and I couldn't find the reason why
certain boards are failing to boot.
I can't reproduce this issue since I only have a DM3730 IGEPv2 board
which boots fine but I should have
AM3517 inherits OMAP3 dts file, but does not have all the IPs
that are present on OMAP3. This patch disables the following
absent IPs for AM3517: Mailbox, IVA, MMU_ISP, MPU_IVA SmartReflex.
A label had to be added for IVA node in omap3.dtsi to be able to
get a reference to the node for disabling.
Add the mailbox device DT node for OMAP5 SoC. The OMAP5 mailbox
IP is identical to that used in OMAP4.
The OMAP5 hwmod data no longer publishes the module address space,
so this patch fixes the WARN_ON backtrace associated with the
following trace during the kernel boot:
omap_hwmod: mailbox:
Hi Tony, Benoit,
This series includes couple of minor fixes in the OMAP DTS files. The patches
are based on 3.15-rc2.
The first patch fixes the only WARN_ON trace present during kernel boot on
OMAP5 uEVM, and this has been present since some time now.
[0.045578] [ cut here
The mailbox module is capable of generating two interrupts
to MPU in OMAP2420, compared to one in OMAP2430. The second
interrupt is to handle interrupts from the additional IVA
processor present only on OMAP2420.
Move the current common mailbox DT node into the SoC
specific files to allow the
Hello Ezequiel,
On Tue, Apr 22, 2014 at 9:37 PM, Ezequiel Garcia
ezequiel.gar...@free-electrons.com wrote:
On Apr 22, Javier Martinez Canillas wrote:
On Tue, Apr 22, 2014 at 3:29 PM, Peter Ujfalusi peter.ujfal...@ti.com
wrote:
On 04/22/2014 04:18 PM, Nishanth Menon wrote:
next-20140422
Hello Nishanth,
On Tue, Apr 22, 2014 at 11:57 PM, Nishanth Menon n...@ti.com wrote:
On 04/22/2014 10:13 AM, Nishanth Menon wrote:
Logs with with DEBUG_LL and early printk below:
Thread: http://marc.info/?t=139817273800014r=1w=2
On 04/22/2014 08:18 AM, Nishanth Menon wrote:
next-20140422
On 04/22/2014 05:45 PM, Javier Martinez Canillas wrote:
[...]
Time for me to verify every platform again.
ok, boards updated with u-boot fixes etc..
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http://slexy.org/raw/s2o4V7QFmX
This one is in discussion in this thread.
We
Hello Linus,
On Wed, Apr 23, 2014 at 12:00 AM, Linus Walleij
linus.wall...@linaro.org wrote:
On Tue, Apr 22, 2014 at 5:52 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
I've revised the patch again and I couldn't find the reason why
certain boards are failing to boot.
I can't
On Wed, Apr 23, 2014 at 12:52 AM, Nishanth Menon n...@ti.com wrote:
On 04/22/2014 05:45 PM, Javier Martinez Canillas wrote:
[...]
Time for me to verify every platform again.
ok, boards updated with u-boot fixes etc..
next-20140422-omap2plus_defconfig
1: am335x-sk: Boot FAIL: http
* Javier Martinez Canillas jav...@dowhile0.org [140422 16:03]:
Hello Linus,
On Wed, Apr 23, 2014 at 12:00 AM, Linus Walleij
linus.wall...@linaro.org wrote:
On Tue, Apr 22, 2014 at 5:52 PM, Javier Martinez Canillas
jav...@dowhile0.org wrote:
I've revised the patch again and I couldn't
* Tony Lindgren t...@atomide.com [140422 08:24]:
* Javier Martinez Canillas jav...@dowhile0.org [140421 23:55]:
On Tue, Apr 22, 2014 at 2:54 AM, Tony Lindgren t...@atomide.com wrote:
2. There seems to be some timing issues with smc911x where
rsync of larger files and apt-get
On Tue, Apr 22, 2014 at 09:22:56AM -0500, Felipe Balbi wrote:
Hi,
On Thu, Mar 20, 2014 at 02:29:57PM -0500, Felipe Balbi wrote:
per CodingStyle we should have those braces, no
functional changes.
Signed-off-by: Felipe Balbi ba...@ti.com
Greg, do you want me to refresh and resend
Separate out legacy code for getting timer-fclk and reuse it for
the DT-case as a fallback. All DT users should ideally be specifying
a clock property with a phandle of its clock node. Till the migration
is complete, add a legacy function to keep things working.
Signed-off-by: Joel Fernandes
In an effort to isolate the time power initialization for future purposes, add
a function to do the same. This primarily involves a hwmod lookup, setup and
enable.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 25 +
1 file changed, 25
For DT-booting platforms, use of_clk_get to get the fclk for system timers.
Separate out the legacy code for non-DT platform use.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git
Here is a clean up series that attempts to separate out some of the DT-only vs
legacy system timer usage for OMAP2+. Emphasis is on separating legacy stuff,
and abstracting annoyances such as hwmod to give us the flexibilty for the
migration. The series will relieve some of the difficulties in
Add a comment describing the state of system timer clock parenting. The code
following the comment should be deleted once all platforms can do DT boot, and
specially should not be executed for DT platforms once we can specify default
clock parents through DT.
Signed-off-by: Joel Fernandes
, there'd be other
side effects I have'nt thought through..
[0]:
[ 25.504976] DONE gpio_irq_type: 533 bank 0xf9e07000, offset 7
[ 25.511052] CPU: 0 PID: 1 Comm: swapper/0 Not tainted
3.15.0-rc2-next-20140422-3-gd9fc91f-dirty #12
[ 25.520811] [c0014cf0] (unwind_backtrace) from [c0011984
Not all platforms currently will support of_clk_get on timer
because they may not have clock property in their DT nodes. Add
code to handle this case so that things are kept working. Finally
we can delete this code once all system timer nodes have a clock
property.
Signed-off-by: Joel Fernandes
hwmod look ups should no longer directly happen for dmtimer users of
DT-boot platforms. We separate out the code for platforms that are
still non-DT. Ultimately this code should be deleted if all platforms
are converted to DT-boot.
We use omap_dmtimer_powerup introduced earlier in the series to
For the OMAPs, we're setting up only one clockevent and clocksource. Further,
for DT boot there's no easy way to get the timer name and currently this is
done in an ugly way by reading a hwmod entry. So let's just set it to a simpler
name like timer_clkev and timer_clksrc.
Signed-off-by: Joel
oh-name is no longer used, correct the error message.
Signed-off-by: Joel Fernandes jo...@ti.com
---
arch/arm/mach-omap2/timer.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 4fcfd7a..519ccfd 100644
---
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