--
Good Day,please Pardon my manner invading your privacy without getting to know
you before now.My name is Janet in Liverpool England currently on treatment for
breast cancer.i need Godly person to handle humanitarian project in my
name(JANET MURRAY DOUGLAS HOME OF THE NEEDY) as hope of
ELM hardware engine is used to detect ECC errors for BCHx ecc-schemes
(like BCH4/BCH8/BCH16). This patch extends configuration of ELM registers
for adding support of BCH16_HW ecc-scheme.
Signed-off-by: Pekon Gupta pe...@ti.com
---
drivers/mtd/devices/elm.c | 36
As this series touches both linux-mtd and linux-omap (GPMC) sub-systems but in
independent patch-sets, so looping both maintainers. 'Ack' from maintainers
would
help in getting this series accepted for 3.16
*changes v3 - v4*
[PATCH v4 1/4]: minor update in comments
[PATCH v4 2/4]: fixed coding
This patch add support for BCH16_ECC in GPMC (controller) driver:
- extends configuration space to include BCH16 registers
- extends parsing of DT binding for selecting BCH16 ecc-scheme
Signed-off-by: Pekon Gupta pe...@ti.com
---
arch/arm/mach-omap2/gpmc.c | 15 +++
This patch add support for BCH16 ecc-scheme in OMAP NAND driver, by extending
following functions:
- omap_enable_hwecc (nand_chip-ecc.hwctl): configure GPMC controller
- omap_calculate_ecc_bch (nand_chip-ecc.calculate): fetch ECC signature from
GPMC controller
- omap_elm_correct_data
- Adds DT binding property for BCH16 ECC scheme
- Adds describes on factors which determine choice of ECC scheme for
particular device
CC: devicet...@vger.kernel.org
Signed-off-by: Pekon Gupta pe...@ti.com
---
.../devicetree/bindings/mtd/gpmc-nand.txt | 45 ++
1
+ DT maintainers
On Friday 16 May 2014 05:47 PM, Peter Ujfalusi wrote:
From CCCFG register of eDMA3 we can get all the needed information for the
driver about the IP:
Number of channels: NUM_DMACH
Number of regions: NUM_REGN
Number of slots (PaRAM sets): NUM_PAENTRY
Number of TC/EQ:
Move the extcon related code to its own function.
Improve code readability, decrease the dwc3_probe() size.
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/usb/dwc3/dwc3-omap.c | 65 ++--
1 file changed, 39 insertions(+), 26 deletions(-)
The dwc3 wrapper driver should not be fiddling with the core interrupts.
Disabling the core interrupts in prepare stops xhci from proper operation.
So remove disable/enable of core interrupts from prepare/complete.
Signed-off-by: George Cherian george.cher...@ti.com
---
Following crash is seen on dwc3_omap removal
Unable to handle kernel NULL pointer dereference at virtual address 0018
pgd = ec098000
[0018] *pgd=ad1f9831, *pte=, *ppte=
Internal error: Oops: 17 [#1] SMP ARM
Modules linked in: usb_f_ss_lb g_zero usb_f_acm u_serial usb_f_ecm
Move map offset to its own seperate function.
Improve code readability, decrease the dwc3_probe() size.
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/usb/dwc3/dwc3-omap.c | 31 +++
1 file changed, 19 insertions(+), 12 deletions(-)
diff --git
Move find and set the utmi mode to its own seperate function.
Improve code readability, decrease the dwc3_probe() size.
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/usb/dwc3/dwc3-omap.c | 44 +---
1 file changed, 25 insertions(+), 19
Remove the x_major calculation logic from the wrapper revision register
to differentiate between OMAP5 and AM437x. This was done to find the
register offsets of wrapper register. Now that We do it using dt
compatible, remove the whole logic.
Signed-off-by: George Cherian george.cher...@ti.com
---
The series does some refactoring on dwc3_probe()
Patch 1 - Now that we use driver compatible for revision check, remove the
unnecessary logic.
Patch 2-4 - reduce the size of dwc3_probe()
Patch 5 - Fix the crash on dwc3_omap removal
Patch 6 - Addresses the issue of xhci hang while resuming from
Hi Bin,
On 5/15/2014 8:49 PM, Bin Liu wrote:
George,
On Thu, May 15, 2014 at 1:28 AM, George Cherian george.cher...@ti.com wrote:
Hi Bin,
On 5/14/2014 10:13 PM, Bin Liu wrote:
George,
On Wed, May 14, 2014 at 9:34 AM, Bin Liu binml...@gmail.com wrote:
George,
On Wed, May 14, 2014 at
Hi Tony,
On 05/06/2014 07:39 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [140430 05:43]:
Hi Benoit Tony,
These patches add I2C touch screen support for am43x-epos-evm
and am437x-gp-evm.
Relevant driver side changes are here.
From: Roger Quadros rog...@ti.com
Fixup Y resolution and add default pin state. Also update
the compatible id and bindings for touchscreen size.
CC: Benoit Cousson bcous...@baylibre.com
CC: Tony Lindgren t...@atomide.com
CC: Mugunthan V N mugunthan...@ti.com
Signed-off-by: Roger Quadros
From: Sekhar Nori nsek...@ti.com
Add touchscreen support for AM437x GP EVM using pixcir
touchscreen controller.
[Roger Q] - Updated bindings for touchscreen size.
CC: Benoit Cousson bcous...@baylibre.com
CC: Tony Lindgren t...@atomide.com
Signed-off-by: Sekhar Nori nsek...@ti.com
Acked-by:
On 17/05/14 00:23, Tony Lindgren wrote:
* Tomi Valkeinen tomi.valkei...@ti.com [140516 01:39]:
Hi Paul,
On 16/05/14 07:45, Paul Walmsley wrote:
Hi Tony
The following changes since commit d1db0eea852497762cab43b905b879dfcd3b8987:
Linux 3.15-rc3 (2014-04-27 19:29:27 -0700)
are available
Adds pinmux and DT node for Micron (MT29F4G08AB) x8 NAND device present on
am437x-gp-evm board.
(1) As NAND Flash data lines are muxed with eMMC, Thus at a given time either
eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled:
(a) By dynamically driving following
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64
(b) NAND Device
MTD NAND partition for file-system should start at offset=0xA0
Signed-off-by: Pekon Gupta pe...@ti.com
Reviewed-by: Javier Martinez Canillas jav...@dowhile0.org
---
arch/arm/boot/dts/am43x-epos-evm.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
*changes v6 - v7*
fixed 'reg = cs offset 'size' property for NAND nodes
*changes v5 - v6*
- removed explicit disabling of GPMC and ELM in am335x-bone-memorycape.dts
as both modules are already disabled by default in am33xx.dtsi
- fixed comments for range and reg properties. keeping it
From: Minal Shah minalks...@gmail.com
DRA7xx platform has in-build GPMC and ELM h/w engines which can be used
for accessing externel NAND flash device. This patch:
- adds generic DT binding in dra7.dtsi for enabling GPMC and ELM h/w engines
- adds DT binding for Micron NAND Flash (MT29F2G16AADWP)
On 16/05/14 21:01, Tony Lindgren wrote:
IMHO appending -omap-dss to a random device is an even bigger hack,
since its adding lots of bloat to the API. Let's assume there is
another OS using DT for ARM, but has no proper API for SPI
controllers and it introduces your hack to SPI devices. That
On Friday 09 May 2014 05:26 PM, Tomi Valkeinen wrote:
From: Sathya Prakash M R sath...@ti.com
Add DSS hwmod data for AM43xx.
Signed-off-by: Sathya Prakash M R sath...@ti.com
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 104
On 17/05/14 00:39, Tony Lindgren wrote:
AFAIK that remapping not needed at all. All that is already
available with the compatible flags.
And alternatively we can also just use the sharp,ls037v7dw01
in the panel driver(s). We can have the panels bail out in driver
probe based on
On 19/05/14 12:24, Rajendra Nayak wrote:
On Friday 09 May 2014 05:26 PM, Tomi Valkeinen wrote:
From: Sathya Prakash M R sath...@ti.com
Add DSS hwmod data for AM43xx.
Signed-off-by: Sathya Prakash M R sath...@ti.com
Signed-off-by: Tomi Valkeinen tomi.valkei...@ti.com
---
On Monday 19 May 2014 03:42 PM, Tomi Valkeinen wrote:
On 19/05/14 12:24, Rajendra Nayak wrote:
On Friday 09 May 2014 05:26 PM, Tomi Valkeinen wrote:
From: Sathya Prakash M R sath...@ti.com
Add DSS hwmod data for AM43xx.
Signed-off-by: Sathya Prakash M R sath...@ti.com
Signed-off-by: Tomi
Hello.
On 19-05-2014 12:32, George Cherian wrote:
Remove the x_major calculation logic from the wrapper revision register
to differentiate between OMAP5 and AM437x. This was done to find the
register offsets of wrapper register. Now that We do it using dt
compatible, remove the whole logic.
Peter,
On Friday 16 May 2014 05:47 PM, Peter Ujfalusi wrote:
Instead of saving the for loop length, take the num_tc value from the pdata.
In case of DT boot set the n_tc to 3 as it is hardwired in edma_of_parse_dt()
This is a temporary state since upcoming patch(es) will change how we are
On 19/05/14 13:28, Rajendra Nayak wrote:
Yeah, thats what it looks like to me. l3_gclk is the 200Mhz clock derived
from
core-m4 post divider and l3s_gclk/l4ls_gclk are half of that at 100Mhz,
derived
using a fixed divider of 2.
Here's an updated patch, with the sdma entry removed and the
Fixes: commit 0611c41934ab35ce84dea34ab291897ad3cbc7be
ARM: OMAP2+: gpmc: update gpmc_hwecc_bch_capable() for new platforms and ECC
schemes
Though the commit log of above commit mentions AM43xx platforms, but code change
missed AM43xx. This patch adds AM43xx to list of those SoC which have
On Monday 19 May 2014 04:40 PM, Tomi Valkeinen wrote:
On 19/05/14 13:28, Rajendra Nayak wrote:
Yeah, thats what it looks like to me. l3_gclk is the 200Mhz clock derived
from
core-m4 post divider and l3s_gclk/l4ls_gclk are half of that at 100Mhz,
derived
using a fixed divider of 2.
On Fri, May 16, 2014 at 10:47:18PM +0800, Zhuang Jin Can wrote:
Hi,
On Fri, May 16, 2014 at 07:41:06AM -0500, Felipe Balbi wrote:
On Fri, May 16, 2014 at 11:50:13PM +0800, Zhuang Jin Can wrote:
On Fri, May 16, 2014 at 05:57:57AM +0800, Zhuang Jin Can wrote:
In ISOC transfers, when
On Saturday 17 May 2014 03:11 AM, Tony Lindgren wrote:
* Balaji T K balaj...@ti.com [140509 09:47]:
moving dmaengine consumer specific function to omap-dmaengine.h
to Resolve build failure seen with sh-allmodconfig:
include/linux/omap-dma.h:171:8: error: expected identifier before numeric
On 03/28/2014 10:54 PM, Dave Gerlach wrote:
Use the ti,fixed-factor-clock version so that autoidle for
dpll_per_clkdcoldo is properly controlled after power management code
is introduced. Without this the clock may be held active even when
it is gated.
Signed-off-by: Dave Gerlach
On 05/06/2014 04:39 PM, Peter Ujfalusi wrote:
Mike,
On 04/24/2014 06:03 PM, Tero Kristo wrote:
On 04/24/2014 12:11 PM, Peter Ujfalusi wrote:
Mike, Tero,
On 04/03/2014 09:29 AM, Peter Ujfalusi wrote:
On 04/02/2014 05:12 PM, Tero Kristo wrote:
On 04/02/2014 04:48 PM, Peter Ujfalusi wrote:
On 04/22/2014 01:06 PM, Tero Kristo wrote:
On 04/16/2014 07:14 AM, Lokesh Vutla wrote:
WDT1 module can take one of the below clocks as input functional
clock -
- On-Chip 32K RC Osc [default/reset]
- 32K from PRCM
The On-Chip 32K RC Osc clock is not an accurate clock-source as per
the
On Friday 16 May 2014 14:30:56 Kishon Vijay Abraham I wrote:
On Wednesday 14 May 2014 06:15 PM, Arnd Bergmann wrote:
On Wednesday 14 May 2014 11:14:45 Kishon Vijay Abraham I wrote:
/ {
#address-cells = 1; // or 2 if you support 4GB address space
#size-cells = 1;
On Friday 16 May 2014 05:47 PM, Peter Ujfalusi wrote:
It is no longer in use by the driver or board files.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
I dropped the /platform_data in subject like to keep it consistent with
what has been done for this file so far. Even looking at logs
On 05/15/2014 06:54 PM, Tero Kristo wrote:
On 05/15/2014 06:53 PM, Laurent Pinchart wrote:
On Monday 12 May 2014 18:06:10 Tony Lindgren wrote:
* Laurent Pinchart laurent.pinch...@ideasonboard.com [140512 16:17]:
On Thursday 08 May 2014 13:57:15 Tomi Valkeinen wrote:
On 21/04/14 13:41,
On Friday 16 May 2014 05:47 PM, Peter Ujfalusi wrote:
Hi,
Changes since v2:
- Comments from Sekhar and Arnd has been addressed best as I could.
- Use the CCCFG information in all cases instead of pdata provided information
- To achieve this I needed to do a bit more cleanup in this series
On 04/29/2014 03:48 PM, Tero Kristo wrote:
On 04/29/2014 11:34 AM, Sourav Poddar wrote:
tbclk does not need to be a composite clock, we can simply
use gate clock for this purpose.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
Looks good to me so:
Acked-by: Tero Kristo t-kri...@ti.com
On 05/05/2014 10:49 AM, Tero Kristo wrote:
On 05/01/2014 10:00 PM, Mike Turquette wrote:
Quoting Tero Kristo (2014-04-29 07:51:14)
On 04/29/2014 05:15 PM, Sourav Poddar wrote:
We need tbclk clock data for the functioning of ehrpwm
module. Hence, populating the required clock information
in
Subject: [PATCH v3 0/5] Add support for SW babble Control
Series add support for SW babble control logic found in
new silicon versions of AM335x. Runtime differentiation of
silicon version is done by checking the BABBLE_CTL register.
For newer silicon the register default value read is 0x4 and
Find whether we are running on newer silicon. The babble control
register reads 0x4 by default in newer silicon as opposed to 0
in old versions of AM335x. Based on this enable the sw babble
control logic.
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/usb/musb/musb_dsps.c | 37
On 04/30/2014 03:30 PM, Tero Kristo wrote:
On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
In OMAP5 bit 8 in PRCM registers are not defined (Reserved) unlike their
counterpart in OMAP4.
It is better to not write to these bits.
Yeah, looks like this bug was copied over from the legacy clock
On 04/30/2014 02:39 PM, Peter Ujfalusi wrote:
In order to get correct clock dividers for AESS/ABE we need to set the
dpll_abe_m2x2_ck rate to be double of dpll_abe_ck.
Signed-off-by: Peter Ujfalusi peter.ujfal...@ti.com
Thanks, queued for 3.15-rc/ti-clk-drv.
-Tero
---
BABBLE and RESET share the same interrupt. The interrupt
is considered to be RESET if MUSB is in peripheral mode and
as a BABBLE if MUSB is in HOST mode.
Handle babble condition iff MUSB is in HOST mode.
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/usb/musb/musb_core.c | 2 +-
Add sw_babble_control() logic to differentiate between transient
babble and real babble condition. Also add the SW babble control
register definitions.
Babble control register logic is implemented in the latest
revision of AM335x.
Signed-off-by: George Cherian george.cher...@ti.com
---
Currently musb_platform_reset() is only used by dsps.
In case of BABBLE interrupt for other platforms the musb_platform_reset()
is a NOP. In such situations no need to re-initialize the endpoints.
Also in the latest silicon revision of AM335x, we do have a babble recovery
mechanism without
For DSPS platform usb_phy_vbus(_off/_on) are NOPs.
So during musb_platform_reset() call usb_phy(_shutdown/_init)
Signed-off-by: George Cherian george.cher...@ti.com
---
drivers/usb/musb/musb_dsps.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
During babble condition both first disconnect of devices are
initiated. Make sure MUSB controller is reset and re-initialized
after all disconnects.
To acheive this schedule a delayed work for babble rrecovery.
While at that convert udelay to usleep_range.
Refer
On 04/30/2014 03:31 PM, Tero Kristo wrote:
On 04/30/2014 02:41 PM, Peter Ujfalusi wrote:
abe_iclk's parent is aess_fclk and not abe_clk.
Also correct the parameters for clock rate calculation as used for OMAP4
since in PRCM level there's no difference between the two platform
regarding to
On 05/07/2014 01:20 PM, Peter Ujfalusi wrote:
Hi,
Changes since v1:
- ATL binding documentation and driver has been separated.
Audio Tracking Logic is designed to be used by HD Radio applications to
synchronize the audio output clocks to the baseband clock. ATL can be also
used to track errors
If the GPIO for the backlight is on an I2C chip, we currently
get nasty warnings like this during the boot:
WARNING: CPU: 0 PID: 6 at drivers/gpio/gpiolib.c:2364
gpiod_set_raw_value+0x40/0x4c()
Modules linked in:
CPU: 0 PID: 6 Comm: kworker/u2:0 Not tainted 3.15.0-rc4-12393-gcde9f4e #400
Hi George,
On Mon, May 19, 2014 at 3:40 AM, George Cherian george.cher...@ti.com wrote:
Hi Bin,
On 5/15/2014 8:49 PM, Bin Liu wrote:
George,
On Thu, May 15, 2014 at 1:28 AM, George Cherian george.cher...@ti.com
wrote:
Hi Bin,
On 5/14/2014 10:13 PM, Bin Liu wrote:
George,
On Wed,
On 03/04/2014 11:18 AM, Tero Kristo wrote:
Hi,
Changes compared to v1:
- fixed OMAP2 only build issues
- fixed OMAP2420 boot issues
- added patch #13 and #14 to remove legacy clock data for OMAP2/OMAP3
- fixed smatch + DT bindings documentation problems reported by Nishanth
This set is
On 05/17/2014 12:16 PM, Joachim Eastwood wrote:
On 17 May 2014 10:51, Joachim Eastwood manab...@gmail.com wrote:
On 14 May 2014 18:25, Joachim Eastwood manab...@gmail.com wrote:
...
I did some more testing over here.
My HTPC (nVidia ION2 based) works good with speaker-test and all
Hello Pekon,
On Fri, May 16, 2014 at 9:07 PM, Pekon Gupta pe...@ti.com wrote:
This patch enables 'wait-pin' monitoring in NAND driver if following
properties
are present under NAND DT node
gpmc,wait-pin = wait-pin number
gpmc,wait-on-read;
gpmc,wait-on-write;
As
Currently the files in /sys/devices/soc0/ show no information about
DRA7. Few userspace programs do depend on this information to make SoC
specific support. So update logic to detect the relevant information and
provide to userspace.
Signed-off-by: Nishanth Menon n...@ti.com
---
based on
Hi,
On Mon, May 19, 2014 at 8:39 AM, George Cherian george.cher...@ti.com wrote:
BABBLE and RESET share the same interrupt. The interrupt
is considered to be RESET if MUSB is in peripheral mode and
as a BABBLE if MUSB is in HOST mode.
Handle babble condition iff MUSB is in HOST mode.
* Tomi Valkeinen tomi.valkei...@ti.com [140519 02:49]:
On 17/05/14 00:39, Tony Lindgren wrote:
AFAIK that remapping not needed at all. All that is already
available with the compatible flags.
And alternatively we can also just use the sharp,ls037v7dw01
in the panel driver(s). We can
* Tomi Valkeinen tomi.valkei...@ti.com [140519 02:22]:
On 16/05/14 21:01, Tony Lindgren wrote:
IMHO appending -omap-dss to a random device is an even bigger hack,
since its adding lots of bloat to the API. Let's assume there is
another OS using DT for ARM, but has no proper API for SPI
Hi,
On Mon, May 19, 2014 at 8:39 AM, George Cherian george.cher...@ti.com wrote:
Currently musb_platform_reset() is only used by dsps.
In case of BABBLE interrupt for other platforms the musb_platform_reset()
is a NOP. In such situations no need to re-initialize the endpoints.
Also in the
* Tomi Valkeinen tomi.valkei...@ti.com [140519 02:02]:
On 17/05/14 00:23, Tony Lindgren wrote:
* Tomi Valkeinen tomi.valkei...@ti.com [140516 01:39]:
Hi Paul,
On 16/05/14 07:45, Paul Walmsley wrote:
Hi Tony
The following changes since commit
* Joachim Eastwood manab...@gmail.com [140518 05:08]:
On 22 April 2014 14:39, Tero Kristo t-kri...@ti.com wrote:
On 04/20/2014 07:22 PM, Gilles Chanteperdrix wrote:
Le 19/04/2014 00:39, Tony Lindgren a écrit :
* Gilles Chanteperdrix gilles.chanteperd...@xenomai.org [140407 13:09]:
* Dmitry Torokhov dmitry.torok...@gmail.com [140518 22:38]:
On Sat, May 17, 2014 at 11:24:10PM +0200, Joachim Eastwood wrote:
This has been unused since omap4 board files went away.
Signed-off-by: Joachim Eastwood manab...@gmail.com
Tony, can I merge both through my tree?
Yes I don't
* Joachim Eastwood manab...@gmail.com [140519 09:24]:
On 19 May 2014 18:13, Tony Lindgren t...@atomide.com wrote:
* Joachim Eastwood manab...@gmail.com [140518 05:08]:
On 22 April 2014 14:39, Tero Kristo t-kri...@ti.com wrote:
On 04/20/2014 07:22 PM, Gilles Chanteperdrix wrote:
Le
* Pekon Gupta pe...@ti.com [140519 02:16]:
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -9,6 +9,7 @@
#include am33xx.dtsi
#include am335x-bone-common.dtsi
+#include am335x-bone-memory-cape.dts
ldo3_reg {
regulator-min-microvolt =
On 19 May 2014 18:13, Tony Lindgren t...@atomide.com wrote:
* Joachim Eastwood manab...@gmail.com [140518 05:08]:
On 22 April 2014 14:39, Tero Kristo t-kri...@ti.com wrote:
On 04/20/2014 07:22 PM, Gilles Chanteperdrix wrote:
Le 19/04/2014 00:39, Tony Lindgren a écrit :
* Gilles
On 05/19/2014 02:07 PM, Sekhar Nori wrote:
To which baseline do the patches apply? These lines are not present at
least in v3.15-rc5. I am applying the patch without this hunk.
It is generate on top of linux-next-20140515.
next picked up several patches since 3.15-rc and I also have my other
* Roger Quadros rog...@ti.com [140519 01:47]:
Hi Tony,
On 05/06/2014 07:39 PM, Tony Lindgren wrote:
* Roger Quadros rog...@ti.com [140430 05:43]:
Hi Benoit Tony,
These patches add I2C touch screen support for am43x-epos-evm
and am437x-gp-evm.
Relevant driver side changes are
On Monday 19 May 2014 08:57:33 Tony Lindgren wrote:
No need to load multiple drivers at this point. That's why I'm saying
you can bail out on the undesired display controller probes using
of_machine_is_compatible test. It's not that uncommon for drivers to do:
$ git grep
On 05/16/2014 11:29 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [140516 06:43]:
Tony,
On Thursday 15 May 2014 02:29 PM, Santosh Shilimkar wrote:
On Thursday 15 May 2014 01:54 PM, Santosh Shilimkar wrote:
On Thursday 15 May 2014 01:50 PM, Daniel Lezcano wrote:
On
* Balaji T K balaj...@ti.com [140519 04:54]:
On Saturday 17 May 2014 03:11 AM, Tony Lindgren wrote:
-
-#if defined(CONFIG_DMA_OMAP) || defined(CONFIG_DMA_OMAP_MODULE)
-bool omap_dma_filter_fn(struct dma_chan *, void *);
-#else
-static inline bool omap_dma_filter_fn(struct dma_chan *c, void
On 05/19/2014 04:06 PM, Sekhar Nori wrote:
On Friday 16 May 2014 05:47 PM, Peter Ujfalusi wrote:
Hi,
Changes since v2:
- Comments from Sekhar and Arnd has been addressed best as I could.
- Use the CCCFG information in all cases instead of pdata provided
information
- To achieve this I
* Daniel Lezcano daniel.lezc...@linaro.org [140519 09:46]:
On 05/16/2014 11:29 PM, Tony Lindgren wrote:
And just to recap, this problem can be reproduced with current
Linux next with omap2plus_defconfig with CONFIG_CPU_IDLE enabled. The
system should hang during the boot at some point.
I
On Monday 19 May 2014 01:23 PM, Tony Lindgren wrote:
* Daniel Lezcano daniel.lezc...@linaro.org [140519 09:46]:
On 05/16/2014 11:29 PM, Tony Lindgren wrote:
And just to recap, this problem can be reproduced with current
Linux next with omap2plus_defconfig with CONFIG_CPU_IDLE enabled. The
Hi Tony,
If found this patch in your omap-for-v3.16/pm-signed tag and tested it
on top of Linus master + omap 3.16 dt + Tomi fbdev omap. I assumed
it's going upstream for 3.16(?).
First of all; is this safe on OMAP4460?
As far as I understand voltage scaling on 4460 has never been
mainline, but
* Santosh Shilimkar santosh.shilim...@ti.com [140519 10:35]:
On Monday 19 May 2014 01:23 PM, Tony Lindgren wrote:
* Daniel Lezcano daniel.lezc...@linaro.org [140519 09:46]:
On 05/16/2014 11:29 PM, Tony Lindgren wrote:
And just to recap, this problem can be reproduced with current
Linux
Hi Tony,
From: Tony Lindgren [mailto:t...@atomide.com]
* Pekon Gupta pe...@ti.com [140519 02:16]:
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -9,6 +9,7 @@
#include am33xx.dtsi
#include am335x-bone-common.dtsi
+#include am335x-bone-memory-cape.dts
* Joachim Eastwood manab...@gmail.com [140519 10:51]:
Hi Tony,
If found this patch in your omap-for-v3.16/pm-signed tag and tested it
on top of Linus master + omap 3.16 dt + Tomi fbdev omap. I assumed
it's going upstream for 3.16(?).
Yes.
First of all; is this safe on OMAP4460?
As far
On 05/19/2014 07:51 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [140519 10:35]:
On Monday 19 May 2014 01:23 PM, Tony Lindgren wrote:
* Daniel Lezcano daniel.lezc...@linaro.org [140519 09:46]:
On 05/16/2014 11:29 PM, Tony Lindgren wrote:
And just to recap, this
On 19 May 05:52 PM, Gupta, Pekon wrote:
Hi Tony,
From: Tony Lindgren [mailto:t...@atomide.com]
* Pekon Gupta pe...@ti.com [140519 02:16]:
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -9,6 +9,7 @@
#include am33xx.dtsi
#include
From: Ezequiel Garcia [mailto:ezequiel.gar...@free-electrons.com]
On 19 May 05:52 PM, Gupta, Pekon wrote:
From: Tony Lindgren [mailto:t...@atomide.com]
Based on the recent discussions on the capes, it seems that nobody
wants to implement toggling of the capes in u-boot. And as there
can be
Hi Javier,
From: Javier Martinez Canillas [mailto:jav...@dowhile0.org]
Hello Pekon,
On Fri, May 16, 2014 at 9:07 PM, Pekon Gupta pe...@ti.com wrote:
This patch enables 'wait-pin' monitoring in NAND driver if following
properties
are present under NAND DT node
gpmc,wait-pin =
On Mon, May 19, 2014 at 1:01 PM, Tony Lindgren t...@atomide.com wrote:
* Joachim Eastwood manab...@gmail.com [140519 10:51]:
Hi Tony,
If found this patch in your omap-for-v3.16/pm-signed tag and tested it
on top of Linus master + omap 3.16 dt + Tomi fbdev omap. I assumed
it's going upstream
On Mon, May 19, 2014 at 1:16 PM, Ezequiel Garcia
ezequiel.gar...@free-electrons.com wrote:
On 19 May 05:52 PM, Gupta, Pekon wrote:
Hi Tony,
From: Tony Lindgren [mailto:t...@atomide.com]
* Pekon Gupta pe...@ti.com [140519 02:16]:
--- a/arch/arm/boot/dts/am335x-bone.dts
+++
On 19 May 2014 20:32, Nishanth Menon n...@ti.com wrote:
On Mon, May 19, 2014 at 1:01 PM, Tony Lindgren t...@atomide.com wrote:
* Joachim Eastwood manab...@gmail.com [140519 10:51]:
Hi Tony,
If found this patch in your omap-for-v3.16/pm-signed tag and tested it
on top of Linus master + omap
From: Robert Nelson [mailto:robertcnel...@gmail.com]
[...]
Since the capes are always some way tied with bb.org hardware, why
don't we put them up on https://github.com/beagleboard/ ?
am335x-capes.git ?
I envision, we should just mirror the base ./arch/arm/boot/dts/
directory (as someday the dts
On 05/19/2014 01:48 PM, Joachim Eastwood wrote:
[...]
we can add TPS data here for 4460 mpu (panda-ES) if that is
interesting to us - given that the common voltage domain/VC/VP stuff
so far has gone in no positive direction in our discussions last year.
If this means that voltage scaling and
On Mon, May 19, 2014 at 1:51 PM, Gupta, Pekon pe...@ti.com wrote:
From: Robert Nelson [mailto:robertcnel...@gmail.com]
[...]
Since the capes are always some way tied with bb.org hardware, why
don't we put them up on https://github.com/beagleboard/ ?
am335x-capes.git ?
I envision, we should just
On 19/05/14 18:57, Tony Lindgren wrote:
I'm not sure if it's even possible to load both of those drivers at the
same time, but if it was, and the first one would get probe() called for
a device, and the driver would return an error, I'm quite sure the
driver framework won't continue trying
On 19/05/14 19:04, Tony Lindgren wrote:
In many cases however we do have multiple compatible strings that
describe how the device is wired. See drivers/tty/serial/of_serial.c
for example. It has ns16550 but then it also has additional
nvidia,tegra20-uart, nxp,lpc3220-uart and
On Mon, May 19, 2014 at 2:11 PM, Kridner, Jason j...@ti.com wrote:
On May 19, 2014, at 11:58 AM, Robert Nelson robertcnel...@gmail.com
wrote:
On Mon, May 19, 2014 at 1:51 PM, Gupta, Pekon pe...@ti.com wrote:
From: Robert Nelson [mailto:robertcnel...@gmail.com]
[...]
Since the capes are
* Daniel Lezcano daniel.lezc...@linaro.org [140519 11:07]:
On 05/19/2014 07:51 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [140519 10:35]:
On Monday 19 May 2014 01:23 PM, Tony Lindgren wrote:
* Daniel Lezcano daniel.lezc...@linaro.org [140519 09:46]:
On 05/16/2014
On 05/19/2014 09:36 PM, Tony Lindgren wrote:
* Daniel Lezcano daniel.lezc...@linaro.org [140519 11:07]:
On 05/19/2014 07:51 PM, Tony Lindgren wrote:
* Santosh Shilimkar santosh.shilim...@ti.com [140519 10:35]:
On Monday 19 May 2014 01:23 PM, Tony Lindgren wrote:
* Daniel Lezcano
* Tomi Valkeinen tomi.valkei...@ti.com [140519 11:58]:
On 19/05/14 18:57, Tony Lindgren wrote:
I'm not sure if it's even possible to load both of those drivers at the
same time, but if it was, and the first one would get probe() called for
a device, and the driver would return an error,
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