[PATCH] pinctrl: dra: dt-bindings: Add virtual mode configuration option

2015-06-22 Thread Nishanth Menon
In addition to the regular mux configuration such as mux mode 1, 2 etc, certain pins of DRA7 require to have virtual mode also programmed. This allows for predefined delay characteristics to be used by the SoC to meet timing characterstics needed for the interface. Provide easy to use macro to do

[PATCH] ARM: DRA7: Provide proper IO map table

2015-06-22 Thread Nishanth Menon
DRA7 uses OMAP5 IO table at the moment. This is purely spurious since the OMAP5 and DRA7 register maps are different in many aspects. AM57xx/DRA7 TRM Reference: http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf NOTE: Most of the drivers are already doing ioremap, so, there should'nt be any functional

[PATCH 4/6] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets

2015-06-22 Thread Keerthy
The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded. This makes it difficult to reuse the code for single core SoCs like AM437x. Hence making it part of omap_prcm_irq_setup structure so that case of single set of IRQ* registers can be handled generically. Signed-off-by:

[PATCH 3/6] ARM: dts: AM4372: Add PRCM IRQ entry

2015-06-22 Thread Keerthy
Add PRCM IRQ entry. Signed-off-by: Keerthy j-keer...@ti.com --- arch/arm/boot/dts/am4372.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 1680602..7bcdeb2 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++

[PATCH 1/6] ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register

2015-06-22 Thread Keerthy
PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence remove hardcoding and use the value provided by the omap_prcm_irq_setup structure. Signed-off-by: Keerthy j-keer...@ti.com --- arch/arm/mach-omap2/prcm-common.h | 1 + arch/arm/mach-omap2/prm44xx.c | 11 ++- 2 files changed, 7

[PATCH 5/6] ARM: OMAP4+: PRM: Add AM437x specific data

2015-06-22 Thread Keerthy
The register offsets for some of the PRM Registers are different hence populating the differing fields. Signed-off-by: Keerthy j-keer...@ti.com --- arch/arm/mach-omap2/prm44xx.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/prm44xx.c

[PATCH 2/6] ARM: AM43xx: Add the PRM IRQ register offsets

2015-06-22 Thread Keerthy
Add the PRM IRQ register offsets. Signed-off-by: Keerthy j-keer...@ti.com --- arch/arm/mach-omap2/prcm43xx.h | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h index d026199..ec1ac5c 100644 --- a/arch/arm/mach-omap2/prcm43xx.h

[PATCH 0/6] ARM: AM437x: Add IO wake up support

2015-06-22 Thread Keerthy
The patch series adds IO wake up support for AM437x series making use of the existing OMAP4 support. Adds the AM437x specifics. The series is boot tested on OMAP4 panda, DAR7 evm and AM437x evms. I do not have OMAP3 boards so not able to test on OMAP3. Keerthy (6): ARM: OMAP4: PRM: Remove

Re: [PATCH REPOST] gpio: omap: use raw locks for locking

2015-06-22 Thread Tony Lindgren
* Javier Martinez Canillas jav...@dowhile0.org [150619 14:57]: On Fri, Jun 19, 2015 at 7:42 PM, santosh shilimkar santosh.shilim...@oracle.com wrote: On 6/19/2015 10:06 AM, Sebastian Andrzej Siewior wrote: This patch converts gpio_bank.lock from a spin_lock into a raw_spin_lock. The call

[PATCH 6/6] ARM: PRM: AM437x: Enable IO wakeup feature

2015-06-22 Thread Keerthy
Enable IO wakeup feature. Signed-off-by: Keerthy j-keer...@ti.com --- arch/arm/mach-omap2/prm_common.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 10ef0da..238cb4a 100644 --- a/arch/arm/mach-omap2/prm_common.c +++

Re: [PATCH 02/13] dmaengine: Introduce dma_request_slave_channel_compat_reason()

2015-06-22 Thread Peter Ujfalusi
On 06/12/2015 03:58 PM, Vinod Koul wrote: Sorry this slipped thru I was away for a week anyways ;) Thinking about it again, I think we should coverge to two APIs and mark the legacy depracuated and look to convert folks and phase that out Currently, w/o this series we have these APIs: /* to

[PATCH 1/1] ARM: dts: DRA72: switch to cpsw slave0 for ethernet

2015-06-22 Thread Mugunthan V N
From: Vignesh R vigne...@ti.com On DRA72 EVM, cpsw slave1 is muxed with VIN2A, hence switch to cpsw slave0 for ethernet. Add gpio hog entry to pcf_gpio_21 in order to select cpsw slave0. Signed-off-by: Vignesh R vigne...@ti.com Signed-off-by: Mugunthan V N mugunthan...@ti.com ---

Re: [PATCH 3/3] mmc: host: omap_hsmmc: Add custom card detect irq handler

2015-06-22 Thread Vignesh R
Hi Andreas, Thanks for testing out these patches. On Sunday 21 June 2015 04:15 AM, Andreas Fenkart wrote: I haven't managed to produce a hang without this patch Reproducing this hang is not straight forward. It takes 40-50 card insertion/removal to see this case (sometimes even 100 tries).