Tejun,
On Tue, Jan 25, 2011 at 5:47 AM, Tejun Heo wrote:
> On Tue, Jan 04, 2011 at 06:24:21AM +0100, Tejun Heo wrote:
>> Using dedicated workqueue or system_wq doesn't make any difference in
>> terms of execution latency anymore. Sleeping work items no longer
>> delay execution of other work ite
> functions to be used by drivers, as per the comment there.
>
> [1] http://marc.info/?l=linux-omap&m=127808467703366&w=2
>
> Signed-off-by: Omar Ramirez Luna
> ---
Acked-by: Hari Kanigeri
> arch/arm/plat-omap/include/plat/omap_device.h | 3 +--
> arch/arm/pl
Hema,
On Tue, Dec 7, 2010 at 6:11 PM, Hema HK wrote:
> Adding the twl6030-usb transceiver support for OMAP4 musb driver.
>
> OMAP4 supports 2 types of transceiver interface.
> +}
> +
> +int omap4430_phy_set_clk(struct device *dev, int on)
> +{
> + static int state;
probably good to initia
On Wed, Dec 1, 2010 at 11:16 PM, Varadarajan, Charulatha wrote:
> On Thu, Dec 2, 2010 at 07:57, Kanigeri, Hari wrote:
>> On Wed, Dec 1, 2010 at 8:10 PM, Kanigeri, Hari wrote:
>>> On Wed, Dec 1, 2010 at 12:04 AM, Varadarajan, Charulatha
>>> wrote:
David,
>>>
> + if (
igned-off-by: Hari Kanigeri
Signed-off-by: Fernando Guzman Lugo
---
arch/arm/plat-omap/include/plat/mailbox.h |7 +-
arch/arm/plat-omap/mailbox.c | 103 -
2 files changed, 61 insertions(+), 49 deletions(-)
diff --git a/arch/arm/plat-omap/include
+ fail_alloc_txq:$
WARNING: please, no space for starting a line,
excluding comments
+ fail_request_irq:$
WARNING: line over 80 characters
+ mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
sizeof(mbox_msg_t));
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap
Schedule the Tasklet to send only when mailbox fifo is full and there are
pending messages in kfifo, else send the message directly in the Process
context. This would avoid needless scheduling of Tasklet for every message
transfer
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c
From: Fernando Guzman Lugo
The variable rq_full flag is a global variable, so if there are multiple
mailbox users there will be conflicts. Now there is a full flag per
mailbox queue.
Reported-by: Ohad Ben-Cohen
Signed-off-by: Fernando Guzman Lugo
Signed-off-by: Hari Kanigeri
---
arch/arm
ailbox: change full flag per mailbox queue instead of global
Hari Kanigeri (3):
OMAP: mailbox: fix checkpatch warnings
OMAP: mailbox: send message in process context
OMAP: mailbox: add notification support for multiple readers
arch/arm/plat-omap/include/plat/mailbox.h |8 +-
arch/arm/pla
On Thu, Nov 25, 2010 at 1:04 AM, Varadarajan, Charulatha wrote:
> Hari,
>
> On Wed, Nov 24, 2010 at 18:31, Kanigeri, Hari wrote:
>> On Wed, Nov 24, 2010 at 2:50 AM, Varadarajan, Charulatha
>> wrote:
>>> On Wed, Nov 24, 2010 at 13:52, Felipe Balbi wrote:
On Wed, Nov 24, 2010 at 10:46:04AM
igned-off-by: Hari Kanigeri
Signed-off-by: Fernando Guzman Lugo
---
arch/arm/plat-omap/include/plat/mailbox.h |7 +-
arch/arm/plat-omap/mailbox.c | 104 -
2 files changed, 62 insertions(+), 49 deletions(-)
diff --git a/arch/arm/plat-omap/include
Schedule the Tasklet to send only when mailbox fifo is full and there are
pending messages in kifo, else send the message directly in the Process
context. This would avoid needless scheduling of Tasklet for every message
transfer
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c
+ fail_alloc_txq:$
WARNING: please, no space for starting a line,
excluding comments
+ fail_request_irq:$
WARNING: line over 80 characters
+ mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
sizeof(mbox_msg_t));
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap
From: Fernando Guzman Lugo
The variable rq_full flag is a global variable, so if there are multiple
mailbox users there will be conflicts. Now there is a full flag per
mailbox queue.
Reported-by: Ohad Ben-Cohen
Signed-off-by: Fernando Guzman Lugo
Signed-off-by: Hari Kanigeri
---
arch/arm
disablign rx interrupt on omap4 is different than its pre-decessors.
The bit in OMAP4_MAILBOX_IRQENABLE_CLR should be set to disable the
interrupts instead of clearing the bit.
Defined rev field in mailbox structure to differentiate the mailbox
versions.
Signed-off-by: Hari Kanigeri
---
arch
o Guzman Lugo (1):
OMAP: mailbox: change full flag per mailbox queue instead of global
Hari Kanigeri (4):
OMAP: mailbox: fix rx interrupt disable in omap4
OMAP: mailbox: fix checkpatch warnings
OMAP: mailbox: send message in process context
OMAP: mailbox: add notification support for multiple re
In omap4, there is no explicit configuration register to enable mailbox clocks.
Defining dummy clock for mailbox clock module to keep the mailbox driver
backward compatible with previous omaps.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/clock44xx_data.c |1 +
1 files changed, 1
igned-off-by: Hari Kanigeri
Signed-off-by: Fernando Guzman Lugo
---
arch/arm/plat-omap/include/plat/mailbox.h |7 +-
arch/arm/plat-omap/mailbox.c | 102 -
2 files changed, 60 insertions(+), 49 deletions(-)
diff --git a/arch/arm/plat-omap/include
Schedule the Tasklet to send only when mailbox fifo is full and there are
pending messages in kifo, else send the message directly in the Process
context. This would avoid needless scheduling of Tasklet for every message
transfer
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c
disabling rx interrupt on omap4 is different than its pre-decessors.
The bit in OMAP4_MAILBOX_IRQENABLE_CLR should be set to disable the
interrupts instead of clearing the bit.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/mailbox.c |5 -
1 files changed, 4 insertions(+), 1
s.net/lists/linux-omap/msg39988.html
http://www.spinics.net/lists/linux-omap/msg39931.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg37278.html
Fernando Guzman Lugo (1):
OMAP: mailbox: change full flag per mailbox queue instead of global
Hari Kanigeri (4):
OMAP: mailbox: f
Fix the checkpatch warnings observed in mailbox module
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 9ce3570..abfc495 100644
--- a
the full flag is
true the interrupt for that mailbox is disabled. So there
is no race condition if full flag is modified before
calling omap_mbox_enable_irq.
Reported-by: Ohad Ben-Cohen
Signed-off-by: Fernando Guzman Lugo
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/include/plat/mailbox.h
Paul,
On Wed, Nov 10, 2010 at 5:27 PM, Paul Walmsley wrote:
> Hello Hari
>
> On Wed, 10 Nov 2010, Hari Kanigeri wrote:
>
>> In omap4, there is no explicit configuration register to enable mailbox
>> clocks.
>> Defining dummy clock for mailbox clock module to keep
Benoit,
>> Resending correcting the subject format based on Benoit's comment and
>> fixing the over-indentation pointed out by Sergei.
>
> Pure nitpicking:
> That's a pretty fast update... but then it should be a v3 :-)
Have to do it fast to keep your attention :). Since you are saying it
is pure
igned-off-by: Hari Kanigeri
Signed-off-by: Fernando Guzman Lugo
---
arch/arm/plat-omap/include/plat/mailbox.h |7 +-
arch/arm/plat-omap/mailbox.c | 102 -
2 files changed, 60 insertions(+), 49 deletions(-)
diff --git a/arch/arm/plat-omap/include
Schedule the Tasklet to send only when mailbox fifo is full and there are
pending messages in kifo, else send the message directly in the Process
context. This would avoid needless scheduling of Tasklet for every message
transfer
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c
the full flag is
true the interrupt for that mailbox is disabled. So there
is no race condition if full flag is modified before
calling omap_mbox_enable_irq.
Reported-by: Ohad Ben-Cohen
Signed-off-by: Fernando Guzman Lugo
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/include/plat/mailbox.h
Fix the checkpatch warnings observed in mailbox module
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 9ce3570..abfc495 100644
--- a
disabling rx interrupt on omap4 is different than its pre-decessors.
The bit in OMAP4_MAILBOX_IRQENABLE_CLR should be set to disable the
interrupts instead of clearing the bit.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/mailbox.c |5 -
1 files changed, 4 insertions(+), 1
In omap4, there is no explicit configuration register to enable mailbox clocks.
Defining dummy clock for mailbox clock module to keep the mailbox driver
backward compatible with previous omaps.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/clock44xx_data.c |1 +
1 files changed, 1
queue instead of global
Hari Kanigeri (5):
OMAP: mailbox: fix rx interrupt disable in omap4
OMAP: mailbox: fix checkpatch warnings
OMAP: mailbox: send message in process context
OMAP: mailbox: add notification support for multiple readers
OMAP4: clocks: add dummy clock for mailbox
arch/arm
Benoit,
Thanks for your comments.
On Wed, Nov 10, 2010 at 10:40 AM, Cousson, Benoit wrote:
> Hi Hari,
>
> On 11/10/2010 1:45 PM, Hari Kanigeri wrote:
>>
>> Thanks to Rene Sapiens and Omar Ramirez for their inputs on initial patch
>> set.
>> http://www.mail-archi
igned-off-by: Hari Kanigeri
Signed-off-by: Fernando Guzman Lugo
---
arch/arm/plat-omap/include/plat/mailbox.h |7 +-
arch/arm/plat-omap/mailbox.c | 102 -
2 files changed, 60 insertions(+), 49 deletions(-)
diff --git a/arch/arm/plat-omap/include
the full flag is
true the interrupt for that mailbox is disabled. So there
is no race condition if full flag is modified before
calling omap_mbox_enable_irq.
Reported-by: Ohad Ben-Cohen
Signed-off-by: Fernando Guzman Lugo
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/include/plat/mailbox.h
Schedule the Tasklet to send only when mailbox fifo is full and there are
pending messages in kifo, else send the message directly in the Process
context. This would avoid needless scheduling of Tasklet for every message
transfer
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c
omap:mailbox-resolve multiple receiver problem
The patch set is tested on omap4 SDP board.
Fernando Guzman Lugo (1):
mailbox: change full flag per mailbox queue instead of global
Hari Kanigeri (5):
omap:mailbox: fix rx interrupt disable in omap4
omap:mailbox-fix checkpatch warnings
Fix the checkpatch warnings observed in mailbox module
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 9ce3570..ed960c1 100644
--- a
disabling rx interrupt on omap4 is different than its pre-decessors.
The bit in OMAP4_MAILBOX_IRQENABLE_CLR should be set to disable the
interrupts instead of clearing the bit.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/mailbox.c |5 -
1 files changed, 4 insertions(+), 1
In omap4, there is no explicit configuration register to enable mailbox clocks.
Defining dummy clock for mailbox clock module to keep the mailbox driver
backward compatible with previous omaps.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/clock44xx_data.c |1 +
1 files changed, 1
Omar,
>> OMAP4 shares one interrupt line for all the mailbox instances.
>> The ISR is handling only the mailbox instance that was registered last.
>
> This shouldn't be needed, request_irq is being called with IRQF_SHARED flag
> and different device ids, so if a message arrives it fires an interr
Omar,
>>
>> static void omap_mbox_fini(struct omap_mbox *mbox)
>> {
>> + if (!--mbox->use_count) {
>> + tasklet_kill(&mbox->txq->tasklet);
>> + flush_work(&mbox->rxq->work);
>> + mbox_queue_free(mbox->txq);
>> + mbox_queue_free(mbox->
Rene,
Thanks for your comment.
>> @@ -92,20 +92,25 @@ int omap_mbox_msg_send(struct omap_mbox *mbox,
>> mbox_msg_t msg) struct omap_mbox_queue *mq = mbox->txq;
>> int ret = 0, len;
>>
>> - spin_lock(&mq->lock);
>> + spin_lock_bh(&mq->lock);
>>
>
> Please check if this scenari
nt
in Transmit Interrupt case too. Only the last registered mailbox is handled.
The fix is to iterate through the list of mailboxes that were registered
checking for the mailbox TX and RX interrupt source.
Signed-off-by: Hari Kanigeri
Signed-off-by: Ramesh Gupta
Signed-off-by: Subramaniam C.A
---
arc
Schedule the Tasklet to send only when mailbox fifo is full, else
send the message in the Process context. This would avoid
needless scheduling of Tasklet for every message transfer
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +++--
1 files changed, 7 insertions
the full flag is
true the interrupt for that mailbox is disabled. So there
is no race condition if full flag is modified before
calling omap_mbox_enable_irq.
Reported-by: Ohad Ben-Cohen
Signed-off-by: Fernando Guzman Lugo
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/include/plat/mailbox.h
igned-off-by: Hari Kanigeri
Signed-off-by: Fernando Guzman Lugo
---
arch/arm/plat-omap/include/plat/mailbox.h |9 ++-
arch/arm/plat-omap/mailbox.c | 102 -
2 files changed, 62 insertions(+), 49 deletions(-)
diff --git a/arch/arm/plat-omap/include
disabling rx interrupt on omap4 is different than its pre-decessors.
The bit in OMAP4_MAILBOX_IRQENABLE_CLR should be set to disable the
interrupts instead of clearing the bit.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/mailbox.c |5 -
1 files changed, 4 insertions(+), 1
In omap4, there is no explicit configuration register to enable mailbox clocks.
Defining dummy clock for mailbox clock module to keep the mailbox driver
backward compatible with previous omaps.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/clock44xx_data.c |1 +
1 files changed, 1
Fix the checkpatch warnings observed in mailbox module
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 9ce3570..ed960c1 100644
--- a
g.
https://patchwork.kernel.org/patch/105650/
Fernando Guzman Lugo (1):
mailbox: change full flag per mailbox queue instead of global
Hari Kanigeri (6):
omap:mailbox: fix rx interrupt disable in omap4
omap:mailbox-fix checkpatch warnings
omap:mailbox-send message in process context
omap:mailb
nt
in Transmit Interrupt case too. Only the last registered mailbox is handled.
The fix is to iterate through the list of mailboxes that were registered
checking for the mailbox TX and RX interrupt source.
Signed-off-by: Hari Kanigeri
Signed-off-by: Ramesh Gupta
Signed-off-by: Subramaniam C.A
---
arc
In omap4, there is no explicit configuration register to enable mailbox clocks.
Defining dummy clock for mailbox clock module to keep the mailbox driver
backward compatible with previous omaps.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/clock44xx_data.c |1 +
1 files changed, 1
igned-off-by: Hari Kanigeri
Signed-off-by: Fernando Guzman Lugo
---
arch/arm/plat-omap/include/plat/mailbox.h |9 ++-
arch/arm/plat-omap/mailbox.c | 102 -
2 files changed, 62 insertions(+), 49 deletions(-)
diff --git a/arch/arm/plat-omap/include
the full flag is
true the interrupt for that mailbox is disabled. So there
is no race condition if full flag is modified before
calling omap_mbox_enable_irq.
Reported-by: Ohad Ben-Cohen
Signed-off-by: Fernando Guzman Lugo
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/include/plat/mailbox.h
Schedule the Tasklet to send only when mailbox fifo is full, else
send the message in the Process context. This would avoid
needless scheduling of Tasklet for every message transfer
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +++--
1 files changed, 7 insertions
disabling rx interrupt on omap4 is different than its pre-decessors.
The bit in OMAP4_MAILBOX_IRQENABLE_CLR should be set to disable the
interrupts instead of clearing the bit.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/mailbox.c |5 -
1 files changed, 4 insertions(+), 1
instead of global
Hari Kanigeri (6):
omap:mailbox: fix rx interrupt disable in omap4
omap:mailbox-fix checkpatch warnings
omap:mailbox-send message in process context
omap:mailbox-resolve multiple receiver problem
omap:mailbox-add notification support for multiple readers
omap:clocks44x
Fix the checkpatch warnings observed in mailbox module
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 9ce3570..ed960c1 100644
--- a
In omap4, there is no explicit configuration register to enable mailbox clocks.
Defining dummy clock for mailbox clock module to keep the mailbox driver
backward compatible with previous omaps.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/clock44xx_data.c |1 +
1 files changed, 1
Fix the checkpatch warnings observed in mailbox module
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 9ce3570..ed960c1 100644
--- a
patch from Fernando was sent to LO, but looks like it
didn't get merged, resending the patch after revising and rebasing.
Fernando Guzman Lugo (1):
mailbox: change full flag per mailbox queue instead of global
Hari Kanigeri (6):
omap:mailbox: fix rx interrupt disabl
nt
in Transmit Interrupt case too. Only the last registered mailbox is handled.
The fix is to iterate through the list of mailboxes that were registered
checking for the mailbox TX and RX interrupt source.
Signed-off-by: Hari Kanigeri
Signed-off-by: Ramesh Gupta
Signed-off-by: Subramaniam C.A
---
arc
disabling rx interrupt on omap4 is different than its pre-decessors.
The bit in OMAP4_MAILBOX_IRQENABLE_CLR should be set to disable the
interrupts instead of clearing the bit.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/mailbox.c |5 -
1 files changed, 4 insertions(+), 1
the full flag is
true the interrupt for that mailbox is disabled. So there
is no race condition if full flag is modified before
calling omap_mbox_enable_irq.
Reported-by: Ohad Ben-Cohen
Signed-off-by: Fernando Guzman Lugo
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/include/plat/mailbox.h
Schedule the Tasklet to send only when mailbox fifo is full, else
send the message in the Process context. This would avoid
needless scheduling of Tasklet for every message transfer
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/mailbox.c |9 +++--
1 files changed, 7 insertions
igned-off-by: Hari Kanigeri
Signed-off-by: Fernando Guzman Lugo
---
arch/arm/plat-omap/include/plat/mailbox.h |9 ++-
arch/arm/plat-omap/mailbox.c | 102 -
2 files changed, 62 insertions(+), 49 deletions(-)
diff --git a/arch/arm/plat-omap/include
flushing the TLB entry.
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/iommu.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 2e603fe..c534280 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap
> On Thu, Aug 12, 2010 at 2:16 AM, Kamoolkar, Mugdha wrote:
>> You are correct that dynamic linking and loading is a feature that is
>> available in DSPBridge, and which is missing in DSPLink, which could work on
>> OMAPL1xx if you ported DSPBridge to OMAPL1xx
>
> I imagined that the lack of MMU
Mugdha,
On Thu, Aug 12, 2010 at 1:16 AM, Kamoolkar, Mugdha wrote:
> Ben,
>
>>
>>
>> >
>> > I'm still not sure about the iommu features required by dspbridge, I
>> > will need to look into this. But 2+3 sound like they could be provided
>> > by DSPLink itself. Would it be sane to put dspbridge on
Ben,
On Wed, Aug 11, 2010 at 2:25 PM, Ben Gardiner
wrote:
> Hello Hari,
>
> On Wed, Aug 11, 2010 at 12:55 PM, Hari Kanigeri
> wrote:
>> Ben,
>>
>>> Yes, dynamic memory management. With DSP Link on the OMAPL138 the
>>> memory allocated to the
Ben,
> Yes, dynamic memory management. With DSP Link on the OMAPL138 the
> memory allocated to the DSP must be specified as a 'hole' in Linux
> memory at boot-time [1[2][3]. It seems (perhaps this is wishful
> thinking) that dspbridge does not have this limitation.
DSPBridge doesn't has this requ
Ben,
> We are attracted to DSPBridge over DSPLink because it appears to have
> better dynamic resource management and it is headed for mainline
> (fingers crossed).
Do you mean dynamic memory management ? Can you please elaborate on
what feature you are referring to ?
>
Thank you,
Best regards,
> +config ENABLE_OFF_MODE_JTAG_ETM_DEBUG
> + bool "Enable hardware emulation context save and restore"
> + depends on ARCH_OMAP3
-- Shouldn't this be depends on OMAP3_EMU instead ?
> + default y
-- As this is debug option, can you keep this "n" by default ?
> + help
> +
>> +s32 tiler_mmap_blk(struct tiler_block_t *blk, u32 offs, u32 size,
>> + struct vm_area_struct *vma, u32 voffs)
>> +{
>> + u32 v, p, len;
>> +
>> + /* don't allow mremap */
>> + vma->vm_flags |= VM_DONTEXPAND | VM_RESERVED;
> Should we add " VM_LOCKED" as w
Fernando,
Thanks for looking at the patch.
On Tue, Jul 20, 2010 at 4:59 PM, Guzman Lugo, Fernando
wrote:
>
>
> Hi Hari,
>
>>
>> @@ -252,28 +252,30 @@ static int omap_mbox_startup(struct omap_mbox *mbox)
>> }
>> }
>>
>> - ret = request_irq(mbox->irq, mbox_interrupt, IRQF_S
mediate return now?)
> The goto/return is both more idiomatic in linux, and I'm sure a simpler patch.
-- Sure, I will make the change.
>
> Phil
>
> From: linux-omap-ow...@vger.kernel.org [linux-omap-ow...@vger.kernel.org] On
> Behalf
Make the mailbox reference counter as atomic variable and remove
the spinlock protection surrounding it.
Signed-off-by: Hari Kanigeri
Signed-off-by: Ohad Ben-Cohen
---
arch/arm/plat-omap/mailbox.c | 21 -
1 files changed, 8 insertions(+), 13 deletions(-)
diff --git a
This patch provides mutiple readers support for a mailbox
instance.
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/include/plat/mailbox.h |6 ++-
arch/arm/plat-omap/mailbox.c | 63
2 files changed, 40 insertions(+), 29 deletions(-)
diff
This patch series provides the support for mutiple readers per mailbox
instance. The first patch is mostly cleanup and the second patch consists
of the changes to provide multiple readers support.
Hari Kanigeri (2):
omap:mailbox-make mailbox reference counter atomic
omap:mailbox-provide
From: Simon Que
Patch to add suport to build hwspinlock modules
Signed-off-by: Simon Que
---
arch/arm/mach-omap2/Makefile |2 ++
arch/arm/plat-omap/Makefile |2 ++
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefil
Ensure that the hwspinlock driver is registered prior to
I2C driver registration since I2C is dependent on hwspinlock.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/hwspinlocks.c |2 +-
arch/arm/plat-omap/hwspinlock.c |3 +--
2 files changed, 2 insertions(+), 3 deletions
returns a spinlock handle.
int hwspinlock_free(struct hwspinlock *);
Frees an allocated hardware spinlock (either reserved or unreserved).
Hari Kanigeri (1):
omap:hwspinlocks-ensure the order of registration
Simon Que (4):
omap:hwmod-hwspinlock-enable
omap:hwspinlock-define HWSPINLOCK base a
eturn NULL. Otherwise it returns a spinlock handle.
int hwspinlock_free(struct hwspinlock *);
Frees an allocated hardware spinlock (either reserved or unreserved).
Signed-off-by: Simon Que
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/hwspinlocks.c| 70 ++
arch/a
From: Simon Que
uncomment the hwmod part for hwspinlock
Signed-off-by: Simon Que
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach
From: Simon Que
Add HWSPINLCOK base address information in omap44xx.h
Signed-off-by: Simon Que
Signed-off-by: Hari Kanigeri
---
arch/arm/plat-omap/include/plat/omap44xx.h |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h
> The VCMM takes the long view. Its designed for a future in which the
> number of IOMMUs will go up and the ways in which these IOMMUs are
> composed will vary from system to system, and may vary at
> runtime. Already, there are ~20 different IOMMU map implementations in
> the kernel. Had the Linu
>
> He demonstrated the usage of his code in one of the emails he sent out
> initially. Did you go over that, and what (or how many) step would you
> use with the current code to do the same thing?
-- So is this patch set adding layers and abstractions to help the User ?
If the idea is to share s
miss
interrupt.
Signed-off-by: Hari Kanigeri
Signed-off-by: Ramesh Gupta
Signed-off-by: Hiroshi Doyu
---
arch/arm/mach-omap2/iommu2.c| 32 ++
arch/arm/plat-omap/include/plat/iommu.h |2 +
arch/arm/plat-omap/iommu.c | 17
ed on Hiroshi, the initial patch set was revised to add more flexibility
to enable TWL and cleanup the part of the code that had layering violations.
https://patchwork.kernel.org/patch/101336/
Hari Kanigeri (2):
omap: iommu-update irq mask to be specific about twl and tlb
omap: iomm
From: Hiroshi DOYU
The function prefix "omap2_iommu_" indicates that the prefixed
function belongs to "omap2_iommu_ops" to provide iommu basic
functionalities for the above layers. It's better to avoid the
prefixed function called in the same prefixed ones internally, like
nested here. Now "iommu
Revise the IRQ mask definitions to handle the MMU faults related
to TWL fault as well as TLB miss fault.
Signed-off-by: Hari Kanigeri
Signed-off-by: Hiroshi Doyu
---
arch/arm/mach-omap2/iommu2.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach
Revise the IRQ mask definitions to handle the MMU faults related
to TWL fault as well as TLB miss fault.
Signed-off-by: Hari Kanigeri
Signed-off-by: Hiroshi Doyu
---
arch/arm/mach-omap2/iommu2.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach
miss
interrupt.
Signed-off-by: Hari Kanigeri
Signed-off-by: Ramesh Gupta
Signed-off-by: Hiroshi Doyu
---
arch/arm/mach-omap2/iommu2.c| 26 +-
arch/arm/plat-omap/include/plat/iommu.h |2 ++
arch/arm/plat-omap/iommu.c | 17
ed on Hiroshi, the initial patch set was revised to add more flexibility
to enable TWL.
Hari Kanigeri (2):
omap: iommu-update irq mask to be specific about twl and tlb
omap: iommu-add functionality to get TLB miss interrupt
arch/arm/mach-omap2/iommu2.c|
The prm-regbits-.h header files are not dependent on prm.h
header file.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |1 +
arch/arm/mach-omap2/prm-regbits-24xx.h |1 -
arch/arm/mach-omap2/prm-regbits-34xx.h |1 -
arch/arm/mach-omap2/prm
miss
interrupt.
Signed-off-by: Hari Kanigeri
Signed-off-by: Ramesh Gupta
---
arch/arm/mach-omap2/iommu2.c| 13 +
arch/arm/plat-omap/include/plat/iommu.h |2 ++
arch/arm/plat-omap/iommu.c | 12
3 files changed, 27 insertions(+), 0 deletions
The current iommu module doesn't provide the mechanism to get MMU fault on
TLB miss when working with locked TLB entries and TWL disabled.
To get the TLB miss interrupt, the TWL should be disabled.
This patch set provides the mechanism to disable TWL and enable TLB miss
interrupt.
Hari Kan
Update the irq mask so that is is clear that the MMU
interrupt is related to TWL fault.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/iommu2.c | 10 --
1 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
2.6.34-rc6 kernel has the Ducati mmu irq define name changed, which is
resulting in compilation error.
Signed-off-by: Hari Kanigeri
---
arch/arm/mach-omap2/omap-iommu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach
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