Kalle Jokiniemi <[EMAIL PROTECTED]> writes:
> From: ext Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
>
> This patch loads the triton2 (twl4030) with scripts that will cut off VDD1
> and VDD2 voltages when SYS_OFF_MODE signal is set.
>
> Signed-off-by: Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
> S
Op 11 sep 2008, om 05:20 heeft Steve Sakoman het volgende geschreven:
On Wed, Sep 10, 2008 at 5:08 PM, Tony Lindgren <[EMAIL PROTECTED]>
wrote:
* Kalle Jokiniemi <[EMAIL PROTECTED]> [080825 03:28]:
From: ext Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
This patch loads the triton2 (twl4030)
On Wed, Sep 10, 2008 at 5:08 PM, Tony Lindgren <[EMAIL PROTECTED]> wrote:
> * Kalle Jokiniemi <[EMAIL PROTECTED]> [080825 03:28]:
>> From: ext Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
>>
>> This patch loads the triton2 (twl4030) with scripts that will cut off VDD1
>> and VDD2 voltages when SYS_O
* Kalle Jokiniemi <[EMAIL PROTECTED]> [080825 03:28]:
> From: ext Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
>
> This patch loads the triton2 (twl4030) with scripts that will cut off VDD1
> and VDD2 voltages when SYS_OFF_MODE signal is set.
Pushing today. I guess we should remove the CONFIG_DISA
From: ext Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
This patch loads the triton2 (twl4030) with scripts that will cut off VDD1
and VDD2 voltages when SYS_OFF_MODE signal is set.
Signed-off-by: Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
Signed-off-by: Kalle Jokiniemi <[EMAIL PROTECTED]>
---
dr
* Kalle Jokiniemi <[EMAIL PROTECTED]> [080819 09:59]:
> On ma, 2008-08-18 at 16:31 +0300, ext Tony Lindgren wrote:
> > * Kalle Jokiniemi <[EMAIL PROTECTED]> [080807 13:10]:
> > > Hi Tony,
> > >
> > > This patch should be safe to apply now as the sys off mode pin polarity
> > > was fixed in the pat
On ma, 2008-08-18 at 16:31 +0300, ext Tony Lindgren wrote:
> * Kalle Jokiniemi <[EMAIL PROTECTED]> [080807 13:10]:
> > Hi Tony,
> >
> > This patch should be safe to apply now as the sys off mode pin polarity
> > was fixed in the patch "Add early init for voltage controller
> > configuration and of
* Kalle Jokiniemi <[EMAIL PROTECTED]> [080807 13:10]:
> Hi Tony,
>
> This patch should be safe to apply now as the sys off mode pin polarity
> was fixed in the patch "Add early init for voltage controller
> configuration and off mode polarity" (index a6cfc46..fc72c11 100644).
>
> I compile & boot
Hi Tony,
This patch should be safe to apply now as the sys off mode pin polarity
was fixed in the patch "Add early init for voltage controller
configuration and off mode polarity" (index a6cfc46..fc72c11 100644).
I compile & boot tested it on SDP board, on both plain master branch and
with Jouni'
On Mon, Jul 21, 2008 at 07:02:05PM +0300, Peter 'p2' De Schrijver wrote:
> +/*
> +*Power Bus Message Format
> +*
> +*Broadcast Message (16 Bits)
> +*DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4]
> +*RES_STATE[3:0]
> +*
> +*Singular Message (16 Bits)
> +*
Signed-off-by: Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
---
drivers/i2c/chips/Makefile|2 +-
drivers/i2c/chips/twl4030-power.c | 337 +
2 files changed, 338 insertions(+), 1 deletions(-)
create mode 100644 drivers/i2c/chips/twl4030-power.c
dif
Signed-off-by: Peter 'p2' De Schrijver <[EMAIL PROTECTED]>
---
drivers/i2c/chips/Makefile|2 +-
drivers/i2c/chips/twl4030-power.c | 337 +
2 files changed, 338 insertions(+), 1 deletions(-)
create mode 100644 drivers/i2c/chips/twl4030-power.c
dif
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