From: Tero Kristo tero.kri...@nokia.com
Previously only chipselect 0 was controlled, which would result in the
chipselect 1 running on too low rate during low core OPPs.
Applies on top of PM branch.
Signed-off-by: Tero Kristo tero.kri...@nokia.com
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arch/arm/mach-omap2/sram34xx.S | 29
Tero Kristo tero.kri...@nokia.com writes:
From: Tero Kristo tero.kri...@nokia.com
Previously only chipselect 0 was controlled, which would result in the
chipselect 1 running on too low rate during low core OPPs.
Applies on top of PM branch.
Signed-off-by: Tero Kristo tero.kri...@nokia.com