Re: [PATCH 1/2] ARM: l2x0: Errata fix for flush by Way operation can cause data corruption

2011-02-28 Thread Russell King - ARM Linux
On Sun, Feb 27, 2011 at 12:00:21PM +, Russell King - ARM Linux wrote: > > +#else > > +/* Optimised out for non-errata case */ > > +static inline void debug_writel(unsigned long val) > > +{ > > } > > #define l2x0_set_debugNULL > > > +#endif I notice you got rid of the inline function

Re: [PATCH 1/2] ARM: l2x0: Errata fix for flush by Way operation can cause data corruption

2011-02-27 Thread Russell King - ARM Linux
On Fri, Feb 18, 2011 at 06:05:24PM +0530, Santosh Shilimkar wrote: > diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c > index 170c9bb..a8caee4 100644 > --- a/arch/arm/mm/cache-l2x0.c > +++ b/arch/arm/mm/cache-l2x0.c > @@ -67,18 +67,22 @@ static inline void l2x0_inv_line(unsigned lon

Re: [PATCH 1/2] ARM: l2x0: Errata fix for flush by Way operation can cause data corruption

2011-02-21 Thread Catalin Marinas
On 18 February 2011 12:35, Santosh Shilimkar wrote: > PL310 implements the Clean & Invalidate by Way L2 cache maintenance > operation (offset 0x7FC). This operation runs in background so that > PL310 can handle normal accesses while it is in progress. Under very > rare circumstances, due to this e

[PATCH 1/2] ARM: l2x0: Errata fix for flush by Way operation can cause data corruption

2011-02-18 Thread Santosh Shilimkar
PL310 implements the Clean & Invalidate by Way L2 cache maintenance operation (offset 0x7FC). This operation runs in background so that PL310 can handle normal accesses while it is in progress. Under very rare circumstances, due to this erratum, write data can be lost when PL310 treats a cacheable