Kishon,
On 20/05/15 16:19, Kishon Vijay Abraham I wrote:
Hi Roger,
On Tuesday 12 May 2015 09:37 PM, Roger Quadros wrote:
SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled
between a SATA DPLL unlock and re-lock to prevent SATA lockup.
Introduce a new DT parameter 'syscon-pllreset'
Kishon,
On 23/05/15 10:22, Kishon Vijay Abraham I wrote:
Roger,
On Friday 22 May 2015 07:28 PM, Roger Quadros wrote:
Kishon,
On 22/05/15 14:34, Kishon Vijay Abraham I wrote:
Roger,
On Wednesday 20 May 2015 07:17 PM, Roger Quadros wrote:
Kishon,
On 20/05/15 16:19, Kishon Vijay Abraham I wr
Roger,
On Friday 22 May 2015 07:28 PM, Roger Quadros wrote:
Kishon,
On 22/05/15 14:34, Kishon Vijay Abraham I wrote:
Roger,
On Wednesday 20 May 2015 07:17 PM, Roger Quadros wrote:
Kishon,
On 20/05/15 16:19, Kishon Vijay Abraham I wrote:
Hi Roger,
On Tuesday 12 May 2015 09:37 PM, Roger Qua
Kishon,
On 22/05/15 14:34, Kishon Vijay Abraham I wrote:
Roger,
On Wednesday 20 May 2015 07:17 PM, Roger Quadros wrote:
Kishon,
On 20/05/15 16:19, Kishon Vijay Abraham I wrote:
Hi Roger,
On Tuesday 12 May 2015 09:37 PM, Roger Quadros wrote:
SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 mus
Roger,
On Wednesday 20 May 2015 07:17 PM, Roger Quadros wrote:
Kishon,
On 20/05/15 16:19, Kishon Vijay Abraham I wrote:
Hi Roger,
On Tuesday 12 May 2015 09:37 PM, Roger Quadros wrote:
SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled
between a SATA DPLL unlock and re-lock to prev
Kishon,
On 20/05/15 16:19, Kishon Vijay Abraham I wrote:
Hi Roger,
On Tuesday 12 May 2015 09:37 PM, Roger Quadros wrote:
SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled
between a SATA DPLL unlock and re-lock to prevent SATA lockup.
Introduce a new DT parameter 'syscon-pllreset'
Hi Roger,
On Tuesday 12 May 2015 09:37 PM, Roger Quadros wrote:
SATA_PLL_SOFT_RESET bit of CTRL_CORE_SMA_SW_0 must be toggled
between a SATA DPLL unlock and re-lock to prevent SATA lockup.
Introduce a new DT parameter 'syscon-pllreset' to provide the syscon
regmap access to this register which