On Thu, May 1, 2014 at 8:12 AM, Grant Likely grant.lik...@secretlab.ca wrote:
On Tue, 29 Apr 2014 01:21:41 +0100, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Apr 29, 2014 at 09:02:27AM +0900, Simon Horman wrote:
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote:
On Tue, 29 Apr 2014 01:21:41 +0100, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Apr 29, 2014 at 09:02:27AM +0900, Simon Horman wrote:
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote:
Since we now automatically enable early BRESP in core L2C-310 code when
Hi Russell,
I emphatically second Grant's opinion here:
This is a good patch series and is a much-needed improvement.
I am in the middle of a board-port for an A9 system, and this
series will greatly simplify things for me *despite* the fact that
I will need to convert to the new write_sec()
On Tue, Apr 29, 2014 at 10:17:01AM -0600, Stephen Warren wrote:
On 04/28/2014 06:02 PM, Simon Horman wrote:
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote:
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need
On 04/28/2014 06:02 PM, Simon Horman wrote:
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote:
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to preserve the value of bit 30
in the auxiliary control register.
Acked-by: Tony Lindgren t...@atomide.com
On 04/28/2014 01:30 PM, Russell King wrote:
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to preserve the value of bit 30
in the auxiliary control register.
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote:
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they should seek to preserve the value of bit 30
in the auxiliary
On Tue, Apr 29, 2014 at 09:02:27AM +0900, Simon Horman wrote:
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote:
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need platforms/SoCs to set this bit
explicitly. Instead, they
