Re: [PATCHv2 11/19] ARM: OMAP4: PM: save/restore CM L3INSTR registers when MPU hits OSWR/OFF mode

2012-05-17 Thread Shilimkar, Santosh
On Thu, May 17, 2012 at 4:47 AM, Kevin Hilman khil...@ti.com wrote: Tero Kristo t-kri...@ti.com writes: From: Rajendra Nayak rna...@ti.com On HS devices on the way out of MPU OSWR and OFF ROM code wrongly overwrites the CM L3INSTR registers. So to avoid this, save them and restore on the

Re: [PATCHv2 11/19] ARM: OMAP4: PM: save/restore CM L3INSTR registers when MPU hits OSWR/OFF mode

2012-05-16 Thread Kevin Hilman
Tero Kristo t-kri...@ti.com writes: From: Rajendra Nayak rna...@ti.com On HS devices on the way out of MPU OSWR and OFF ROM code wrongly overwrites the CM L3INSTR registers. So to avoid this, save them and restore on the way out from MPU OSWR/OFF. This errata applies to all HS/EMU versions

[PATCHv2 11/19] ARM: OMAP4: PM: save/restore CM L3INSTR registers when MPU hits OSWR/OFF mode

2012-05-14 Thread Tero Kristo
From: Rajendra Nayak rna...@ti.com On HS devices on the way out of MPU OSWR and OFF ROM code wrongly overwrites the CM L3INSTR registers. So to avoid this, save them and restore on the way out from MPU OSWR/OFF. This errata applies to all HS/EMU versions of OMAP4. Signed-off-by: Rajendra Nayak