On Tue, Jul 1, 2008 at 8:55 PM, Gadiyar, Anand <[EMAIL PROTECTED]> wrote:
>
>
>> Actually, I don't have any detail information about the IP from mentor of
>> Blackfin.
>> I just found the instruction from the Blackfin manual. We need to clear DMA
>> IRQ flag
>> manually on Blackfin, although it
> Actually, I don't have any detail information about the IP from mentor of
> Blackfin.
> I just found the instruction from the Blackfin manual. We need to clear DMA
> IRQ flag
> manually on Blackfin, although it is not true on Davinci.
>
> >
> >> > > But when I tried to write large file to the
On Mon, Jun 30, 2008 at 12:23 PM, David Brownell <[EMAIL PROTECTED]> wrote:
> On Monday 02 June 2008, Bryan Wu wrote:
>> > The DMA interrupt register is cleared on a read. I don't think you need
>> > to explicitly clear it.
>>
>> Maybe there some difference between Blackfin and OMAP implementation.
On Monday 02 June 2008, Bryan Wu wrote:
> > The DMA interrupt register is cleared on a read. I don't think you need
> > to explicitly clear it.
>
> Maybe there some difference between Blackfin and OMAP implementation.
> From the Datatsheet of BF54x, it said that:
> ---
> ... When the status has be
On Tue, Jun 3, 2008 at 12:27 PM, Gadiyar, Anand <[EMAIL PROTECTED]> wrote:
>> Hi folks,
>>
>> I am trying to enable the whole musb HS DMA code on Blackfin. But
>> found the is no place to clean the DMA interrupt flag in musbhsdma.c.
>> As a result, the irq always happens with the same DMA irq sourc
> Hi folks,
>
> I am trying to enable the whole musb HS DMA code on Blackfin. But
> found the is no place to clean the DMA interrupt flag in musbhsdma.c.
> As a result, the irq always happens with the same DMA irq source. I
> add some code to clear the DMA interrupt. Did I miss something here?
The
Hi folks,
I am trying to enable the whole musb HS DMA code on Blackfin. But
found the is no place to clean the DMA interrupt flag in musbhsdma.c.
As a result, the irq always happens with the same DMA irq source. I
add some code to clear the DMA interrupt. Did I miss something here?
After enabling