* Russell King - ARM Linux <[EMAIL PROTECTED]> [080911 01:46]:
> On Wed, Sep 10, 2008 at 04:28:07PM -0700, Tony Lindgren wrote:
> > I guess Catalin will submit his patch at some point after 2.6.28 opens.
> > I'll apply it l-o tree, and remove the L2 debug info we had in id.c
> > to clean up id.c in
On Wed, Sep 10, 2008 at 04:28:07PM -0700, Tony Lindgren wrote:
> I guess Catalin will submit his patch at some point after 2.6.28 opens.
> I'll apply it l-o tree, and remove the L2 debug info we had in id.c
> to clean up id.c in the future patches.
As I've said on the main ARM lists where I've giv
* Tony Lindgren <[EMAIL PROTECTED]> [080808 03:41]:
> * Dirk Behme <[EMAIL PROTECTED]> [080807 19:38]:
> >
> > Recent ARM kernel doesn't detect and output Cortex-A8 cache
> > configuration correctly. Result is something like this in kernel's boot
> > messages:
> >
> > -- cut --
> > ...
> > CPU:
* Dirk Behme <[EMAIL PROTECTED]> [080807 19:38]:
>
> Recent ARM kernel doesn't detect and output Cortex-A8 cache
> configuration correctly. Result is something like this in kernel's boot
> messages:
>
> -- cut --
> ...
> CPU: ARMv7 Processor [411fc082] revision 2 (ARMv7), cr=00c5387f
> ...
> CPU
Recent ARM kernel doesn't detect and output Cortex-A8 cache
configuration correctly. Result is something like this in kernel's
boot messages:
-- cut --
...
CPU: ARMv7 Processor [411fc082] revision 2 (ARMv7), cr=00c5387f
...
CPU0: D VIPT write-through cache
CPU0: cache: 768 bytes, associativit
