One correction:
On Tue, 12 May 2009, Paul Walmsley wrote:
> At least receive overruns are handled gracefully by the controller.
> Transmit FIFO underruns may be the more pressing problem.
Rather, transmit underruns are probably nonfatal in master mode also.
But both receive overruns and trans
On Tue, 12 May 2009, Woodruff, Richard wrote:
> > From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
> > ow...@vger.kernel.org] On Behalf Of Paul Walmsley
> > A brief update for anyone following along on the list:
> >
> > Aaro sent me a test-case. It seems that the receive overruns only a
> From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
> ow...@vger.kernel.org] On Behalf Of Paul Walmsley
> A brief update for anyone following along on the list:
>
> Aaro sent me a test-case. It seems that the receive overruns only affect
> PM kernels. They are caused by the MPU going to
On Mon, 27 Apr 2009, Aaro Koskinen wrote:
> Paul Walmsley wrote:
> > It seems to work: under constant I2C load, no spurious IRQ messages
> > showed up after several hours of testing. (Without these patches,
> > spurious IRQs usually show up in a few minutes.) Some of the code has
> > also been c
Hello,
Paul Walmsley wrote:
It seems to work: under constant I2C load, no spurious IRQ messages
showed up after several hours of testing. (Without these patches,
spurious IRQs usually show up in a few minutes.) Some of the code has
also been cleaned up.
Any feedback on how this series works f
