On Fri, 8 Apr 2011, Li Li wrote:
Dears,
I cannot understand how TLS EMU ensure it's SMP safe, because get_tls
helper (at 0x0fe0) just read the value from 0x0ff0. But all
SMP cores should have the exact same mapping to the vectors page (at
0x). So various threads running on
Nicolas,
Thanks for the explanation. :)
I noticed what you mentioned. Actually, Kconfig says TLS EMU might be
used in some old (e.g. pre-armv6) SMP platforms without TLS
register. In such a case, could we still ensure it's SMP safe by a
single ldr?
Thanks,
Lea
On Fri, Apr 8, 2011 at 9:19 PM,
Ah, I see. That's why I saw abnormal behavior when I enabled TLS EMU
on an ARMv7 SMP SOC. Many thanks! :)
On Fri, Apr 8, 2011 at 10:35 PM, Jamie Lokier ja...@shareable.org wrote:
Li Li wrote:
Nicolas,
Thanks for the explanation. :)
I noticed what you mentioned. Actually, Kconfig says TLS
Li Li wrote:
Nicolas,
Thanks for the explanation. :)
I noticed what you mentioned. Actually, Kconfig says TLS EMU might be
used in some old (e.g. pre-armv6) SMP platforms without TLS
register. In such a case, could we still ensure it's SMP safe by a
single ldr?
In that case, the
Dears,
I cannot understand how TLS EMU ensure it's SMP safe, because get_tls
helper (at 0x0fe0) just read the value from 0x0ff0. But all
SMP cores should have the exact same mapping to the vectors page (at
0x). So various threads running on different SMP cores at the
same time
* Tony Lindgren t...@atomide.com [100702 13:32]:
* Nicolas Pitre n...@fluxnic.net [100702 05:31]:
On Thu, 1 Jul 2010, Jamie Lokier wrote:
Tony Lindgren wrote:
+static void __init kuser_get_tls_init(unsigned long vectors)
+{
+ /*
+* vectors + 0xfe0 =
* Nicolas Pitre n...@fluxnic.net [100702 05:31]:
On Thu, 1 Jul 2010, Jamie Lokier wrote:
Tony Lindgren wrote:
+static void __init kuser_get_tls_init(unsigned long vectors)
+{
+ /*
+ * vectors + 0xfe0 = __kuser_get_tls
+ * vectors + 0xfe8 = hardware TLS instruction at
* Nicolas Pitre n...@fluxnic.net [100630 17:36]:
On Wed, 30 Jun 2010, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [100630 14:02]:
* Nicolas Pitre n...@fluxnic.net [100629 22:14]:
Updated patch below.
And a bug crept in..
+ .macro set_tls_v6, tp, tmp1, tmp2
+
Tony Lindgren wrote:
+static void __init kuser_get_tls_init(unsigned long vectors)
+{
+ /*
+ * vectors + 0xfe0 = __kuser_get_tls
+ * vectors + 0xfe8 = hardware TLS instruction at 0x0fe8
+ */
+ if (tls_emu || has_tls)
+ memcpy((void *)vectors + 0xfe0,
On Thu, 1 Jul 2010, Jamie Lokier wrote:
Tony Lindgren wrote:
+static void __init kuser_get_tls_init(unsigned long vectors)
+{
+ /*
+* vectors + 0xfe0 = __kuser_get_tls
+* vectors + 0xfe8 = hardware TLS instruction at 0x0fe8
+*/
+ if (tls_emu || has_tls)
+
* Nicolas Pitre n...@fluxnic.net [100629 22:14]:
On Tue, 29 Jun 2010, Tony Lindgren wrote:
Also, can we detect somehow the hardware that uses CONFIG_TLS_REG_EMUL?
Might be possible to remove that Kconfig option too later on..
Well... I don't think we _should_ try to detect it as it is
* Tony Lindgren t...@atomide.com [100630 14:02]:
* Nicolas Pitre n...@fluxnic.net [100629 22:14]:
Updated patch below.
And a bug crept in..
+ .macro set_tls_v6, tp, tmp1, tmp2
+ ldr \tmp1, =elf_hwcap
+ ldr \tmp1, [\tmp1, #0]
+ mov \tmp2, #0x0fff
+ tst
On Wed, 30 Jun 2010, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [100630 14:02]:
* Nicolas Pitre n...@fluxnic.net [100629 22:14]:
Updated patch below.
And a bug crept in..
+ .macro set_tls_v6, tp, tmp1, tmp2
+ ldr \tmp1, =elf_hwcap
+ ldr \tmp1, [\tmp1,
* Jamie Lokier ja...@shareable.org [100623 16:30]:
Tony Lindgren wrote:
* Jamie Lokier ja...@shareable.org [100622 19:54]:
Tony Lindgren wrote:
__kuser_get_tls: @ 0x0fe0
-
-#if !defined(CONFIG_HAS_TLS_REG) !defined(CONFIG_TLS_REG_EMUL)
-
On Tue, 29 Jun 2010, Tony Lindgren wrote:
OK. Sorry for the delay again. Here's an updated version that sets
__kuser_get_tls instruction dynamically. Does this do what you were
thinking, or did I miss something?
See my comments below.
Also, can we detect somehow the hardware that uses
* Jamie Lokier ja...@shareable.org [100622 19:54]:
Tony Lindgren wrote:
__kuser_get_tls: @ 0x0fe0
-
-#if !defined(CONFIG_HAS_TLS_REG) !defined(CONFIG_TLS_REG_EMUL)
- ldr r0, [pc, #(16 - 8)] @ TLS stored at 0x0ff0
-#else
- mrc
On Wed, Jun 23, 2010 at 10:39:13AM +0300, Tony Lindgren wrote:
Yeah that can be done for __kuser_get_tls if it's always writable.
But __switch_to is trickier because of the CONFIG_MMU ifdefs there.
And impossible with XIP kernels.
What if we have optional __switch_to and __kuser_get_tls
* Russell King - ARM Linux li...@arm.linux.org.uk [100623 11:06]:
On Wed, Jun 23, 2010 at 10:39:13AM +0300, Tony Lindgren wrote:
Yeah that can be done for __kuser_get_tls if it's always writable.
But __switch_to is trickier because of the CONFIG_MMU ifdefs there.
And impossible with XIP
On Wed, Jun 23, 2010 at 12:28:44PM +0300, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [100623 11:06]:
On Wed, Jun 23, 2010 at 10:39:13AM +0300, Tony Lindgren wrote:
Yeah that can be done for __kuser_get_tls if it's always writable.
But __switch_to is trickier
Tony Lindgren wrote:
Also problematical with XIP - if we go down the route of implementing
these by copying code fragments into the kernel, we need to strip out
XIP support or implement a second way. Obviously having a second way
adds maintainence burden, and the second way will probably
Tony Lindgren wrote:
* Jamie Lokier ja...@shareable.org [100622 19:54]:
Tony Lindgren wrote:
__kuser_get_tls: @ 0x0fe0
-
-#if !defined(CONFIG_HAS_TLS_REG) !defined(CONFIG_TLS_REG_EMUL)
- ldr r0, [pc, #(16 - 8)] @ TLS stored at 0x0ff0
On Wed, 23 Jun 2010, Jamie Lokier wrote:
For other things like __switch_to and maybe cache maintenance calls,
dmb() etc, I'd suggest first doing a generic asm mechanism like x86's
alternatives, keeping in mind that one of the alternatives has to be
XIP friendly.
You cannot be XIP friendly
Nicolas Pitre wrote:
On Wed, 23 Jun 2010, Jamie Lokier wrote:
For other things like __switch_to and maybe cache maintenance calls,
dmb() etc, I'd suggest first doing a generic asm mechanism like x86's
alternatives, keeping in mind that one of the alternatives has to be
XIP friendly.
* Tony Lindgren t...@atomide.com [100621 16:45]:
The TLS register is only available on ARM1136 r1p0 and later.
Set HWCAP_TLS flags if hardware TLS is available.
Note that we now use 0x0ff4 for flagging software TLS to
__kuser_get_tls, and 0x0ff8 for storing the software TLS value.
Tony Lindgren wrote:
__kuser_get_tls: @ 0x0fe0
-
-#if !defined(CONFIG_HAS_TLS_REG) !defined(CONFIG_TLS_REG_EMUL)
- ldr r0, [pc, #(16 - 8)] @ TLS stored at 0x0ff0
-#else
- mrc p15, 0, r0, c13, c0, 3 @ read TLS register
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