On Wed, 17 Dec 2014, Tero Kristo wrote:
The dual parent issue required by the DPLL code is caused by the introduction
of determine-rate / set-parent / set-rate-and-parent logic to OMAP DPPLs. I
took a short-cut here, making the assumption that every DPLL has both of these
clocks defined
On Wed, 17 Dec 2014, Lucas Stach wrote:
Maybe I'm thinking about this too lightly, but I think we already have
the right abstractions in place.
The clock tree in Linux is always modeled along the flow of reference
clocks. So typically the root of the tree is something like an
oscillator
Quoting Paul Walmsley (2014-12-18 11:23:07)
On Wed, 17 Dec 2014, Lucas Stach wrote:
Maybe I'm thinking about this too lightly, but I think we already have
the right abstractions in place.
The clock tree in Linux is always modeled along the flow of reference
clocks. So typically the
On Thu, 18 Dec 2014, Mike Turquette wrote:
Quoting Paul Walmsley (2014-12-18 11:23:07)
Flipping over from hardware to software, in the Linux clock tree, there's
usually not much point to modeling the VCO/DCO directly because it tends
not to be under the direct control of the OS, and it
Am Dienstag, den 16.12.2014, 22:25 + schrieb Paul Walmsley:
+ p...@pwsan.com (I prefer not having to deal with MS Exchange when
possible :-) )
On Tue, 16 Dec 2014, Russell King - ARM Linux wrote:
On Tue, Dec 16, 2014 at 08:45:25PM +, Paul Walmsley wrote:
On Tue, 16 Dec 2014,
On 12/17/2014 11:52 AM, Lucas Stach wrote:
Am Dienstag, den 16.12.2014, 22:25 + schrieb Paul Walmsley:
+ p...@pwsan.com (I prefer not having to deal with MS Exchange when
possible :-) )
On Tue, 16 Dec 2014, Russell King - ARM Linux wrote:
On Tue, Dec 16, 2014 at 08:45:25PM +, Paul
On 12/15/2014 05:31 PM, Paul Walmsley wrote:
I just took a quick glance at Tero's second patch, and it looks like a
hack to me. Better to fix the problem in the core CCF code if
possible. I don't think there's any reason why a PLL couldn't have
just one parent clock. But I'm fine with
+ Tero
On 12/16/2014 12:01 PM, Stephen Boyd wrote:
On 12/15/2014 05:31 PM, Paul Walmsley wrote:
I just took a quick glance at Tero's second patch, and it looks like a
hack to me. Better to fix the problem in the core CCF code if
possible. I don't think there's any reason why a PLL couldn't
On Tue, Dec 16, 2014 at 01:01:17PM -0700, Paul Walmsley wrote:
So the reference clock and functional clock are (usually) required by the
PLL to operate, and should therefore be required by the PLL clock driver
code in the kernel; but one could claim that they aren't technically parent
clocks
On Tue, 16 Dec 2014, Russell King - ARM Linux wrote:
On Tue, Dec 16, 2014 at 01:01:17PM -0700, Paul Walmsley wrote:
So the reference clock and functional clock are (usually) required by the
PLL to operate, and should therefore be required by the PLL clock driver
code in the kernel; but one
On Tue, Dec 16, 2014 at 08:45:25PM +, Paul Walmsley wrote:
On Tue, 16 Dec 2014, Russell King - ARM Linux wrote:
On Tue, Dec 16, 2014 at 01:01:17PM -0700, Paul Walmsley wrote:
So the reference clock and functional clock are (usually) required by the
PLL to operate, and should
+ p...@pwsan.com (I prefer not having to deal with MS Exchange when
possible :-) )
On Tue, 16 Dec 2014, Russell King - ARM Linux wrote:
On Tue, Dec 16, 2014 at 08:45:25PM +, Paul Walmsley wrote:
On Tue, 16 Dec 2014, Russell King - ARM Linux wrote:
On Tue, Dec 16, 2014 at 01:01:17PM
On 12/15/2014 03:02 PM, Mike Turquette wrote:
Quoting Paul Walmsley (2014-12-12 15:28:32)
On Fri, 12 Dec 2014, Mike Turquette wrote:
Quoting Tony Lindgren (2014-12-05 10:38:49)
* Stephen Boyd sb...@codeaurora.org [141205 10:23]:
On 12/05/2014 08:55 AM, Tony Lindgren wrote:
Hi,
Looks like
* Paul Walmsley pwalms...@nvidia.com [141215 16:23]:
On 12/15/2014 03:02 PM, Mike Turquette wrote:
Quoting Paul Walmsley (2014-12-12 15:28:32)
On Fri, 12 Dec 2014, Mike Turquette wrote:
Quoting Tony Lindgren (2014-12-05 10:38:49)
* Stephen Boyd sb...@codeaurora.org [141205 10:23]:
On
On 12/15/2014 05:38 PM, Tony Lindgren wrote:
* Paul Walmsley pwalms...@nvidia.com [141215 16:23]:
On 12/15/2014 03:02 PM, Mike Turquette wrote:
Quoting Paul Walmsley (2014-12-12 15:28:32)
On Fri, 12 Dec 2014, Mike Turquette wrote:
Quoting Tony Lindgren (2014-12-05 10:38:49)
* Stephen Boyd
Hi,
Looks like commit 646cafc6aa4d (clk: Change clk_ops-determine_rate
to return a clk_hw as the best parent) breaks booting at least for
omap4.
Below is the output from omap4-sdp with DEBUG_LL and earlyprintk
enabled.
Regards,
Tony
[1.670806] clock: dpll_abe_ck failed transition to
On 12/05/2014 08:55 AM, Tony Lindgren wrote:
Hi,
Looks like commit 646cafc6aa4d (clk: Change clk_ops-determine_rate
to return a clk_hw as the best parent) breaks booting at least for
omap4.
Do you get a compilation warning in arch/arm/mach-omap2/dpll3xxx.c ?
From what I can tell
* Stephen Boyd sb...@codeaurora.org [141205 10:23]:
On 12/05/2014 08:55 AM, Tony Lindgren wrote:
Hi,
Looks like commit 646cafc6aa4d (clk: Change clk_ops-determine_rate
to return a clk_hw as the best parent) breaks booting at least for
omap4.
Do you get a compilation warning in
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