Hi,
On Tue, Jul 30, 2013 at 10:44:48AM +0530, Kishon Vijay Abraham I wrote:
On Mon, Jul 29, 2013 at 08:59:26PM +0530, Kishon Vijay Abraham I wrote:
Previously MUSB wrapper (OMAP) device used PLATFORM_DEVID_AUTO while
creating
MUSB core device. So in usb_bind_phy (binds the controller
On 30/07/13 08:48, Archit Taneja wrote:
Hi,
On Friday 26 July 2013 12:38 PM, Tomi Valkeinen wrote:
Use new display drivers for devkit8000 board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Hi Chen,
On Tuesday 30 July 2013 09:08 AM, Chen Baozi wrote:
Hi all,
I'm trying to boot my OMAP5432 uEVM devboard with the lastest kernel of
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git.
Which
Hi,
On Tuesday 30 July 2013 11:31 AM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 10:44:48AM +0530, Kishon Vijay Abraham I wrote:
On Mon, Jul 29, 2013 at 08:59:26PM +0530, Kishon Vijay Abraham I wrote:
Previously MUSB wrapper (OMAP) device used PLATFORM_DEVID_AUTO while
creating
MUSB
Hi,
On Tue, Jul 30, 2013 at 11:41:23AM +0530, Kishon Vijay Abraham I wrote:
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
b/arch/arm/mach-omap2/board-2430sdp.c
index 244d8a5..17bb076 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@
Hi,
On Friday 26 July 2013 12:38 PM, Tomi Valkeinen wrote:
Use the new display drivers for OMAP3 Overo board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Note that the LCD add-on boards for lcd43 and
Hi,
On Tuesday 30 July 2013 11:48 AM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 11:41:23AM +0530, Kishon Vijay Abraham I wrote:
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
b/arch/arm/mach-omap2/board-2430sdp.c
index 244d8a5..17bb076 100644
---
Hi,
On Tue, Jul 30, 2013 at 11:55:04AM +0530, Kishon Vijay Abraham I wrote:
On Tue, Jul 30, 2013 at 11:41:23AM +0530, Kishon Vijay Abraham I wrote:
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
b/arch/arm/mach-omap2/board-2430sdp.c
index 244d8a5..17bb076 100644
---
On 30/07/13 09:21, Archit Taneja wrote:
Hi,
On Friday 26 July 2013 12:38 PM, Tomi Valkeinen wrote:
Use the new display drivers for OMAP3 Overo board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board files to use the new ones and phase out the old ones.
Hi,
On Tuesday 30 July 2013 11:58 AM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 11:55:04AM +0530, Kishon Vijay Abraham I wrote:
On Tue, Jul 30, 2013 at 11:41:23AM +0530, Kishon Vijay Abraham I wrote:
diff --git a/arch/arm/mach-omap2/board-2430sdp.c
* Benoit Cousson benoit.cous...@gmail.com [130729 15:24]:
Hi Nishanth,
Thanks for the quick update.
On 29/07/2013 19:03, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured on OMAP5 uEVM. This
series
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
In an effort to move to using Scatter gather lists of any size with
EDMA as discussed at [1] instead of placing limitations on the driver,
we work through the limitations of the EDMAC hardware to find missed
events and issue them.
The
* Felipe Balbi ba...@ti.com [130729 05:27]:
On Fri, Jul 26, 2013 at 10:15:54PM +0200, Sebastian Andrzej Siewior wrote:
The nop driver isn't a do-nothing-stub but supports a couple functions
like clock on/off or is able to use a voltage regulator. This patch
simply renames the driver to
On Tuesday 30 July 2013 12:09 PM, Tomi Valkeinen wrote:
On 30/07/13 09:21, Archit Taneja wrote:
Hi,
On Friday 26 July 2013 12:38 PM, Tomi Valkeinen wrote:
Use the new display drivers for OMAP3 Overo board.
The new OMAP display drivers were merged for 3.11, and we can now change
the board
On Sun, Jul 21, 2013 at 08:46:53AM -0700, Greg KH wrote:
On Sun, Jul 21, 2013 at 01:12:07PM +0200, Tomasz Figa wrote:
On Sunday 21 of July 2013 16:37:33 Kishon Vijay Abraham I wrote:
Hi,
On Sunday 21 July 2013 04:01 PM, Tomasz Figa wrote:
Hi,
On Saturday 20 of July 2013
Hi,
On Tue, Jul 30, 2013 at 12:16:20PM +0530, Kishon Vijay Abraham I wrote:
the list of controller device (names) it can support (PHY framework does
not
maintain a separate list for binding like how we had in USB PHY
library). e.g.
Hi Felipe,
On Monday 29 July 2013 06:05 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 29, 2013 at 04:45:02PM +0530, Sourav Poddar wrote:
+ irq = platform_get_irq(pdev, 0);
+ if (irq 0) {
+ dev_err(pdev-dev, no irq resource?\n);
+ return irq;
+ }
+
+
On 07/30/2013 09:08 AM, Tony Lindgren wrote:
Looking at this patch there's a pretty high probability of introducing
pointless merge conflicts.
How about do the platform data related changes as a separate follow-up
series? You can typically do this by keeping the old features around,
then
On 07/30/2013 06:53 AM, George Cherian wrote:
Control module have 2 separate registers for phy on/off per instance
(offset 0x620 and 0x628), where as
wkup_ctrl is a shared control module register (offset 0x648). Currently
the control module driver maps
memory from 0x620 till beyond 0x648
Hi,
On Tue, Jul 30, 2013 at 01:04:28PM +0530, Sourav Poddar wrote:
Hi Felipe,
On Monday 29 July 2013 06:05 PM, Felipe Balbi wrote:
Hi,
On Mon, Jul 29, 2013 at 04:45:02PM +0530, Sourav Poddar wrote:
+ irq = platform_get_irq(pdev, 0);
+ if (irq 0) {
+
* Sebastian Andrzej Siewior bige...@linutronix.de [130730 00:41]:
On 07/30/2013 09:08 AM, Tony Lindgren wrote:
Looking at this patch there's a pretty high probability of introducing
pointless merge conflicts.
How about do the platform data related changes as a separate follow-up
On Tuesday 30 July 2013 12:46 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 12:16:20PM +0530, Kishon Vijay Abraham I wrote:
the list of controller device (names) it can support (PHY framework does
not
maintain a separate list for binding like how we had in USB PHY
library). e.g.
On Tue, Jul 30, 2013 at 01:41:23PM +0530, Kishon Vijay Abraham I wrote:
On Tuesday 30 July 2013 12:46 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 12:16:20PM +0530, Kishon Vijay Abraham I wrote:
the list of controller device (names) it can support (PHY framework
does not
On Monday 29 July 2013 06:59 PM, Joel Fernandes wrote:
We certainly don't want error conditions to be cleared anywhere
'anywhere' is a really loaded term.
as this will make us 'forget' about missed events. We depend on
knowing which events were missed in order to be able to reissue them.
On 07/30/2013 07:19 AM, George Cherian wrote:
So from what I see now, it is most likely the easiest thing to just add
that wakeup to the phy driver I posted. Do you agree?
The whole idea of writing a seperate phy driver was to use the generic
phy framework
and most of the am devices
On 07/30/2013 09:56 AM, Tony Lindgren wrote:
A separate minimal branch against -rc3 sounds good to me.
Great. Felipe, can you please put this change in a separate -rc3 based
branch which you and Tony will pull in?
Regards,
Tony
Sebastian
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To unsubscribe from this list: send the line
On Tue, 30 Jul 2013, Rajendra Nayak wrote:
Looks like this one is already been queued by Greg.
OK, thanks for letting me know; I've dropped it.
- Paul
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More majordomo
Hi Will
On Mon, 29 Jul 2013, Will Deacon wrote:
I wouldn't worry about checking for CPU_V6. Besides, we probably need this
to be re-evaluated across barrier() when we get CPU migration on a
big-little platform anyway (we should probably also drop the
__attribute_const__ for that).
So you
From: R Sricharan r.sricha...@ti.com
The PRCM and MPUSS parts of DRA7 devices are quite identical
to OMAP5 so as to reuse all the existing infrastructure around it.
Makefile updates to do just that.
Signed-off-by: R Sricharan r.sricha...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
From: R Sricharan r.sricha...@ti.com
Add minimal device tree source needed for DRA7 based SoCs.
Also add a board dts file for the dra7-evm (based on dra752)
which contains 1.5G of memory with 1G interleaved and 512MB
non-interleaved. Also added in the board file are pin configuration
details for
From: R Sricharan r.sricha...@ti.com
All of OMAP5 timer support for clocksource and clockevent is completely
reused across DRA7.
Signed-off-by: R Sricharan r.sricha...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/Kconfig |2 +-
arch/arm/mach-omap2/timer.c |
From: R Sricharan r.sricha...@ti.com
Describe minimal DT boot machine details for DRA7xx based SoC's. DRA7xx
family is based on dual core ARM CORTEX A15 using GIC as the interrupt
controller.
The PRCM and timer infrastructure is reused from OMAP5 and so are the io
descriptor tables.
The soc_ops for dra7xx devices can be completed reused
from the ones used for omap4 and omap5 devices.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: R Sricharan r.sricha...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Changes in v2:
-1- Fixed minor changelog details
-2- Dropped the SRAM support patch since we need to move to drivers/misc/sram.c
-3- Added DTS update patches to this series which were earlier posted as
part of the data series (Since they don't have much objections as against the
other in-kernel
From: R Sricharan r.sricha...@ti.com
The DRA7xx is a high-performance, infotainment application device,
based on enhanced OMAP architecture integrated on a 28-nm technology.
DRA7xx family is composed of DRA75x and DRA74x devices.
Adding the DRA752 ES1.0 cpu revision detection support.
From: R Sricharan r.sricha...@ti.com
The IO descriptor tables for DRA7 are a complete reuse from OMAP5.
A new dra7xx_init_early() does the base address inits.
Signed-off-by: R Sricharan r.sricha...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
---
arch/arm/mach-omap2/common.h |1 +
From: R Sricharan r.sricha...@ti.com
DRA7xx has 8 GPIO banks so that there are 32x8 = 256 GPIOs.
In order for the gpiolib to detect and initialize these
and other TWL GPIOs, ARCH_NR_GPIO is set to 512 using the
kconfig default for DRA7.
Signed-off-by: R Sricharan r.sricha...@ti.com
Commit 621a0147d5c921f4cc33636ccd0602ad5d7cbfbc (ARM: 7757/1: mm:
don't flush icache in switch_mm with hardware broadcasting) breaks
the boot on OMAP2430SDP with omap2plus_defconfig. Tracked to an
undefined instruction abort from the CP15 read in
cache_ops_need_broadcast(). It turns out that
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Tony
The following changes since commit 5ae90d8e467e625e447000cb4335c4db973b1095:
Linux 3.11-rc3 (2013-07-28 20:53:33 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending.git
On Tue, Jul 30, 2013 at 1:52 AM, Tony Lindgren t...@atomide.com wrote:
* Benoit Cousson benoit.cous...@gmail.com [130729 15:24]:
On 29/07/2013 19:03, Nishanth Menon wrote:
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured on
On 07/30/2013 01:07 AM, Chen Baozi wrote:
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Hi Chen,
On Tuesday 30 July 2013 09:08 AM, Chen Baozi wrote:
Hi all,
I'm trying to boot my OMAP5432 uEVM devboard with the lastest kernel of
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
[...]
# Clock framework
obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o
@@ -181,6 +187,8 @@ obj-$(CONFIG_SOC_AM33XX)+= $(clock-common)
dpll3xxx.o
obj-$(CONFIG_SOC_AM33XX)
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
Add minimal device tree source needed for DRA7 based SoCs.
Also add a board dts file for the dra7-evm (based on dra752)
which contains 1.5G of memory with 1G interleaved and 512MB
non-interleaved. Also added in
Hi Lokesh list,
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Clk data might be missing here. Try merging the below branch and test it
https://git.kernel.org/cgit/linux/kernel/git/ssantosh/linux.git/log/?h=for_3.11/out_of_tree/omap5_clk_data
You can also use Linus's
On Tuesday 30 July 2013 05:56 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
[...]
# Clock framework
obj-$(CONFIG_ARCH_OMAP2)+= $(clock-common) clock2xxx.o
@@ -181,6 +187,8 @@ obj-$(CONFIG_SOC_AM33XX)+=
On 07/30/2013 07:38 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 05:56 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
[...]
# Clock framework
obj-$(CONFIG_ARCH_OMAP2)+= $(clock-common) clock2xxx.o
@@ -181,6
On Jul 30, 2013, at 8:24 PM, Nishanth Menon n...@ti.com wrote:
On 07/30/2013 01:07 AM, Chen Baozi wrote:
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Hi Chen,
On Tuesday 30 July 2013 09:08 AM, Chen Baozi wrote:
Hi all,
I'm trying to boot my OMAP5432 uEVM
On Tuesday 30 July 2013 06:00 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
Add minimal device tree source needed for DRA7 based SoCs.
Also add a board dts file for the dra7-evm (based on dra752)
which contains 1.5G of memory
On 07/30/2013 07:41 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 06:00 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
[...]
+mcspi4: spi@480ba000 {
+compatible = ti,omap4-mcspi;
+reg =
On Tuesday 30 July 2013 06:11 PM, Nishanth Menon wrote:
On 07/30/2013 07:38 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 05:56 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
[...]
# Clock framework
On Tuesday 30 July 2013 06:16 PM, Nishanth Menon wrote:
On 07/30/2013 07:41 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 06:00 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
[...]
+mcspi4: spi@480ba000 {
+
On 07/30/2013 07:48 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 06:11 PM, Nishanth Menon wrote:
On 07/30/2013 07:38 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 05:56 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra Nayak wrote:
From: R Sricharan r.sricha...@ti.com
On Tuesday 30 July 2013 06:27 PM, Nishanth Menon wrote:
On 07/30/2013 07:48 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 06:11 PM, Nishanth Menon wrote:
On 07/30/2013 07:38 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 05:56 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra
On Tuesday 30 July 2013 06:29 PM, Nishanth Menon wrote:
On 07/30/2013 07:56 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 06:16 PM, Nishanth Menon wrote:
On 07/30/2013 07:41 AM, Rajendra Nayak wrote:
On Tuesday 30 July 2013 06:00 PM, Nishanth Menon wrote:
On 07/30/2013 06:25 AM, Rajendra
Move the wl1251 part of the wl12xx platform data structure into a new
structure specifically for wl1251. Change the platform data built-in
block and board files accordingly.
Cc: Tony Lindgren t...@atomide.com
Signed-off-by: Luciano Coelho coe...@ti.com
Acked-by: Tony Lindgren t...@atomide.com
Read the clock nodes from the device tree and use them to set the
frequency for the refclock and the tcxo clock.
Also, call sdio_set_drvdata() earlier, so the glue is already set in
the driver data when we call wlcore_get_pdata_from_of() and we don't
need to pass it as a parameter.
The fref and the tcxo clocks settings are optional in some platforms.
WiLink8 doesn't need either, so we don't check the values. WiLink 6
only needs the fref clock, so we check that it is valid or return with
an error. WiLink7 needs both clocks, if either is not available we
return with an
Add refclock and tcxoclock as clock providers in WiLink. These clocks
are not accesible outside the WiLink module, but they are registered
in the clock framework anyway. Only the WiLink chip consumes these
clocks.
In theory, the WiLink chip could be connected to external clocks
instead of using
Instead of defining an enumeration with the FW specific values for the
different clock rates, use the actual frequency instead. Also add a
boolean to specify whether the clock is XTAL or not.
Change all board files to reflect this.
Additionally, this reverts commit 26f45c (ARM: OMAP2+: Legacy
Hi,
This patch series adds device tree support to the wlcore_sdio driver,
which is used by WiLink6, WiLink7 and WiLink8.
The first patches do some clean-up to make the data needed in the
wilink device tree node smaller. The remaining patches implement the
actual device tree node parsing in
The pwr_in_suspend flag depends on the MMC settings which can be
retrieved from the SDIO subsystem, so it doesn't need to be part of
the platform data structure. Move it to the platform device data that
is passed from SDIO to wlcore.
Signed-off-by: Luciano Coelho coe...@ti.com
Reviewed-by:
The platform_quirk element in the platform data was used to change the
way the IRQ is triggered. When set, the EDGE_IRQ quirk would change
the irqflags used and treat edge trigger differently from the rest.
Instead of hiding this irq flag setting behind the quirk, have the
board files set the
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM +0530, Rajendra Nayak wrote:
@@ -379,6 +407,13 @@ IS_OMAP_TYPE(3430, 0x3430)
# define soc_is_omap543x() is_omap543x()
#endif
+# if defined(CONFIG_SOC_DRA7XX)
+# undef soc_is_dra7xx
+# undef soc_is_dra75x
+# define soc_is_dra7xx()
If platform data is not available, try to get the required information
from the device tree. Register an OF match table and parse the
appropriate device tree nodes.
Parse interrupt property only, for now.
Signed-off-by: Luciano Coelho coe...@ti.com
Reviewed-by: Felipe Balbi ba...@ti.com
---
On 07/30/2013 07:44 AM, Chen Baozi wrote:
On Jul 30, 2013, at 8:24 PM, Nishanth Menon n...@ti.com wrote:
On 07/30/2013 01:07 AM, Chen Baozi wrote:
On Jul 30, 2013, at 11:52 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Hi Chen,
On Tuesday 30 July 2013 09:08 AM, Chen Baozi wrote:
Hi all,
On Tue, Jul 30, 2013 at 04:10:09PM +0300, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM +0530, Rajendra Nayak wrote:
@@ -379,6 +407,13 @@ IS_OMAP_TYPE(3430, 0x3430)
# define soc_is_omap543x() is_omap543x()
#endif
+# if defined(CONFIG_SOC_DRA7XX)
+# undef
The following changes since commit ad81f0545ef01ea651886dddac4bef6cec930092:
Linux 3.11-rc1 (2013-07-14 15:18:27 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v3.11/fixes-omap5
for you to fetch changes up to
Arnd Olof,
Can you please take this pull request directly? Other than the
omap5 regulator dts changes I just posted I don't yet have
anything else queued up right now.
Regards,
Tony
* Paul Walmsley p...@pwsan.com [130730 04:53]:
Hi Tony
The following changes since commit
* Felipe Balbi ba...@ti.com [130730 06:25]:
On Tue, Jul 30, 2013 at 04:10:09PM +0300, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM +0530, Rajendra Nayak wrote:
@@ -379,6 +407,13 @@ IS_OMAP_TYPE(3430, 0x3430)
# define soc_is_omap543x() is_omap543x()
Hi,
this is still broken on v3.11-rc3 and Luca got his Blaze (OMAP4) to fail
the same way
On Tue, Jul 16, 2013 at 10:45:38AM -0700, Mike Turquette wrote:
On Tue, Jul 16, 2013 at 6:10 AM, Eduardo Valentin
eduardo.valen...@ti.com wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On Tuesday 30 July 2013 06:40 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM +0530, Rajendra Nayak wrote:
@@ -379,6 +407,13 @@ IS_OMAP_TYPE(3430, 0x3430)
# define soc_is_omap543x() is_omap543x()
#endif
+# if defined(CONFIG_SOC_DRA7XX)
+# undef soc_is_dra7xx
On Tue, Jul 30, 2013 at 11:15:20AM +0300, Felipe Balbi wrote:
look at Greg's and my reply to that email.
but finally Greg agreed to what Tomasz proposed no?
that's not what I see in the thread. I see Greg agreed to regulator's
own IDs being sequentially created, but he mentions device
Hi,
On Tue, Jul 30, 2013 at 07:48:23PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 06:40 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM +0530, Rajendra Nayak wrote:
@@ -379,6 +407,13 @@ IS_OMAP_TYPE(3430, 0x3430)
# define soc_is_omap543x()
On 7/30/2013 2:23 PM, Sebastian Andrzej Siewior wrote:
On 07/30/2013 07:19 AM, George Cherian wrote:
So from what I see now, it is most likely the easiest thing to just add
that wakeup to the phy driver I posted. Do you agree?
The whole idea of writing a seperate phy driver was to use the
On Tue, Jul 30, 2013 at 07:54:55PM +0530, George Cherian wrote:
On 7/30/2013 2:23 PM, Sebastian Andrzej Siewior wrote:
On 07/30/2013 07:19 AM, George Cherian wrote:
So from what I see now, it is most likely the easiest thing to just add
that wakeup to the phy driver I posted. Do you agree?
On Tuesday 30 July 2013 07:53 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 07:48:23PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 06:40 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM +0530, Rajendra Nayak wrote:
@@ -379,6 +407,13 @@ IS_OMAP_TYPE(3430, 0x3430)
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On 07/30/2013 04:33 PM, Felipe Balbi wrote:
let's try not to add any new TI-specific DT bindings, can you
figure that out by reading some revision register ? Or perhaps by
using different compatible strings ?
I would suggest to use a different
On Tue, Jul 30, 2013 at 06:05:52AM +0100, Gururaja Hebbar wrote:
Hi,
On 7/3/2013 2:17 PM, Hebbar Gururaja wrote:
Since AM33xx RTC IP has RTC_IRQWAKEEN to support Alarm Wake-up.
Update the rtc compatible property to ti,am3352-rtc to enable handling
of this feature inside rtc-omap
On Tue, Jul 30, 2013 at 12:32:06PM +0100, Paul Walmsley wrote:
Commit 621a0147d5c921f4cc33636ccd0602ad5d7cbfbc (ARM: 7757/1: mm:
don't flush icache in switch_mm with hardware broadcasting) breaks
the boot on OMAP2430SDP with omap2plus_defconfig. Tracked to an
undefined instruction abort
On 07/23/2013 02:19 AM, Tero Kristo wrote:
clk_get_sys / clk_get can now find clocks from device-tree. If a DT clock
is found, an entry is added to the clk_lookup list also for subsequent
searches.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Russell King li...@arm.linux.org.uk
---
On 07/23/2013 02:19 AM, Tero Kristo wrote:
Parses OMAP clock data from DT and registers those clocks with the clock
framework. dt_omap_clk_init must be called early during boot for timer
initialization so it is exported and called from the existing clock code
instead of probing like a real
Hi,
On Tue, Jul 30, 2013 at 08:06:31PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 07:53 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 07:48:23PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 06:40 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 04:55:39PM
This patch probably was submitted in the wrong sequence - fails build
and few other issues below.
On 07/23/2013 02:19 AM, Tero Kristo wrote:
The OMAP clock driver now supports DPLL clock type. This patch also
adds support for DT DPLL nodes.
Then why is $subject specific to OMAP4? is that
On 7/30/2013 8:25 PM, Mark Rutland wrote:
On Tue, Jul 30, 2013 at 06:05:52AM +0100, Gururaja Hebbar wrote:
Hi,
On 7/3/2013 2:17 PM, Hebbar Gururaja wrote:
Since AM33xx RTC IP has RTC_IRQWAKEEN to support Alarm Wake-up.
Update the rtc compatible property to ti,am3352-rtc to enable handling
On 7/30/2013 9:17 AM, Joel Fernandes wrote:
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a432e6c..765d578 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
+ } else {
+ for (; i pdev-num_resources; i++) {
+ if
Add regulator, pin muxing and MMC5 configuration to be used by the
on-board WiLink6 module.
Signed-off-by: Luciano Coelho coe...@ti.com
---
arch/arm/boot/dts/omap4-sdp.dts | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/omap4-sdp.dts
Add the WiLink device tree nodes. On omap4-panda, a WiLink6 module is
connected on MMC5 and a GPIO interrupt is used. The refclock
frequency is 38.4MHz.
Signed-off-by: Luciano Coelho coe...@ti.com
---
arch/arm/boot/dts/omap4-panda-common.dtsi | 14 ++
1 file changed, 14
Hi,
These patches add the necessary DT configuration to use the WLAN part
of WiLink on OMAP4 Pandaboard and on OMAP4-SDP (including Blaze).
I've tested these changes on Panda and it works fine. But I couldn't
test the OMAP4 SDP changes properly on 3.11-rc3 because I'm having
problems with
Add appropriate device tree node for Blaze's WiLink7 module. It uses
a GPIO as interrupt, so configure the gpio2 node as interrupt parent
and assign the corresponding GPIO. Additionally, add the clock
frequencies used by the module.
Signed-off-by: Luciano Coelho coe...@ti.com
---
this patch should be 3/33 to allow dpll.c to build.
On 07/23/2013 02:19 AM, Tero Kristo wrote:
Some of the clock.h contents are needed by the new OMAP clock driver,
including dpll_data and clk_hw_omap. Thus, move these to the generic
omap header file which can be accessed by the driver.
Hi Luciano,
Thank you for the patch.
On Monday 29 July 2013 17:55:28 Luciano Coelho wrote:
Add device tree bindings documentation for the TI WiLink modules.
Currently only the WLAN part of the WiLink6, WiLink7 and WiLink8
modules is supported.
Signed-off-by: Luciano Coelho coe...@ti.com
Hi,
On Tuesday 30 July 2013 09:02 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 08:06:31PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 07:53 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 07:48:23PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 06:40 PM, Felipe Balbi
On 07/23/2013 02:20 AM, Tero Kristo wrote:
Some devices require their clocks to be available with a specific
dev-id con-id mapping. With DT, the clocks can be found by default
only with their name, or alternatively through the device node of
the consumer. With drivers, that don't support DT
On 07/30/2013 01:37 PM, Sricharan R wrote:
Hi,
On Tuesday 30 July 2013 09:02 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 08:06:31PM +0530, Sricharan R wrote:
On Tuesday 30 July 2013 07:53 PM, Felipe Balbi wrote:
Hi,
On Tue, Jul 30, 2013 at 07:48:23PM +0530, Sricharan R wrote:
On
(using the new devicetree mailing list address)
On Tue, 2013-07-30 at 20:24 +0200, Laurent Pinchart wrote:
Hi Luciano,
Thank you for the patch.
On Monday 29 July 2013 17:55:28 Luciano Coelho wrote:
Add device tree bindings documentation for the TI WiLink modules.
Currently only the
On 07/23/2013 02:20 AM, Tero Kristo wrote:
OMAP clk driver now routes some of the basic clocks through own
registration routine to allow autoidle support. This routine just
checks a couple of device node properties and adds autoidle support
if required, and just passes the registration forward
On 07/23/2013 02:20 AM, Tero Kristo wrote:
This node adds support for a clock node which allows control to the
clockdomain enable / disable.
Dont we have clkdm_enable/disable for the same? should we model
clockdomain as a clock node?
Signed-off-by: Tero Kristo t-kri...@ti.com
---
On 07/23/2013 02:20 AM, Tero Kristo wrote:
AM335x has DPLL clocks that should never be attempted to be gated. Adding
ti,dpll-no-gate property for them handles this situation.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/clk/omap/dpll.c | 10 ++
1 file changed, 10
On 07/23/2013 02:20 AM, Tero Kristo wrote:
This patch creates a unique node for each clock in the OMAP4 power,
reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly
different clock tree which is taken into account in the data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
On 07/23/2013 02:20 AM, Tero Kristo wrote:
clk-44xx.c now contains the clock init functionality for omap4, including
DT clock registration and adding of static clkdev entries.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/clk/omap/clk-44xx.c | 118
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