On Tue, 2012-05-29 at 11:31 -0700, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
On Wed, 2012-05-16 at 15:36 -0700, Kevin Hilman wrote:
+Jean for functional power states
Tero Kristo t-kri...@ti.com writes:
This patch adds device off support to OMAP4 device type
On Tue, 2012-05-29 at 15:10 -0500, Menon, Nishanth wrote:
On Mon, May 14, 2012 at 5:18 AM, Tero Kristo t-kri...@ti.com wrote:
Added similar PM errata flag support as omap3 has. A few errata flags
will be added in subsequent patches.
Considering that we might have erratas for future SoCs
On Tue, 2012-05-29 at 13:15 -0700, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
On Wed, 2012-05-16 at 17:06 -0700, Kevin Hilman wrote:
+Benoit
Tero Kristo t-kri...@ti.com writes:
save_secure_all needs l3_main_3_ick and l4_secure_clkdm enabled,
otherwise the secure
On Tue, 2012-05-29 at 15:48 -0500, Menon, Nishanth wrote:
On Tue, May 29, 2012 at 3:15 PM, Kevin Hilman khil...@ti.com wrote:
Tero Kristo t-kri...@ti.com writes:
On Wed, 2012-05-16 at 17:06 -0700, Kevin Hilman wrote:
+Benoit
Tero Kristo t-kri...@ti.com writes:
save_secure_all
On Tue, 2012-05-29 at 14:30 -0700, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
Current I2C timing parameters do not work with Panda board at least.
Parameters updated based on TI recommendation.
Signed-off-by: Tero Kristo t-kri...@ti.com
Let's fix this correctly
On Wed, 2012-05-30 at 16:08 -0500, Menon, Nishanth wrote:
On Mon, May 14, 2012 at 5:18 AM, Tero Kristo t-kri...@ti.com wrote:
Currently device off does not have any counters / timers of its own
and it is impossible to track the time spent in this state. In device
off, MPU / CORE
and autoidle flag for clocks that
are hardware controlled and should be skipped in usecount
calculations.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/clkt_iclk.c | 21 +
arch/arm/mach
dpll3, dpll4 and sdrc_ick are controlled automatically by hardware.
Thus, reflect this with the autoidle flags, the clocks will no longer
show as active in usecount dumps and will allow the voltdm-sleep /
wakeup calls to work properly.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley
Some clockdomains can't support manual domain transitions triggered by
clock framework, and must be prevented from doing so. Added clkdm flag
CLKDM_SKIP_MANUAL_TRANS for doing this.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomain.c |6 ++
arch/arm/mach
DPLL4 (PER DPLL) disable can cause issues on omap3, thus prevent
disable / enable by setting the clkops as core_dpll_ops. Also, prevent
l3 / l4 core clkdomain manual transitions as these can cause issues also.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock3xxx_data.c
from kernel code,
by calling the pm_dbg_dump_X functions. The plan is to call these
functions once an error condition is detected, e.g. failed suspend.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm-debug.c
-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clockdomains3xxx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c
b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 6038adb..0dae4c8 100644
--- a/arch/arm/mach
This works similarly to e.g. pwrdm_for_each(). Needed by enhanced
usecounting debug functionality that will be added to pm-debug.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/plat-omap/clock.c | 33
, and will allow vc
callbacks to be triggered at right point of time.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Paul Walmsley p...@pwsan.com
Cc: Kevin Hilman khil...@ti.com
---
arch/arm/mach-omap2/pm34xx.c |3 ++
arch/arm/mach-omap2/pm44xx.c |3 ++
arch/arm/mach-omap2/powerdomain.c
Hi,
Refreshed the patches against latest mainline kernel, and did some
updates mainly proposed by Nishanth Menon n...@ti.com. Changes compared
to previous version:
patch 1:
- added check against null pointer
patch 2:
- added BUG_ON in case clkdm / pwrdm usecount goes negative
patch 3:
-
These are updated based on powerdomain usecounts. Also added support
for voltdm-sleep and voltdm-wakeup calls that will be invoked once
voltagedomain enters sleep or wakes up based on usecount numbers. These
will be used for controlling voltage scaling functionality.
Signed-off-by: Tero Kristo t
Hi,
This set applies on top of the pwrdm / voltdm usecounting fixes set.
Contains some fixes proposed mainly by Nishanth Menon n...@ti.com.
http://marc.info/?l=linux-omapm=133847159830867w=2
Changes compared to previous version:
- huge patch #3 in set v5 was split into patches 3...6
- dropped
routines to set a cap if the voltage is out of
reach for the PMIC.
Reported-by: Jon Hunter jon-hun...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
Signed-off-by: Vishwanath BS vishwanath...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 17
These are now called vddmin and vddmax, as these fields will be used
globally for selecting voltage ranges for a pmic channel, and not
only for voltage processor.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 28 ++--
arch/arm/mach
, and OFF timings are used if PMIC signal
(nsleep) is used to control all the off mode voltages at the same time.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/vc.c | 108 ++---
arch/arm/mach-omap2/vc.h |1 -
2 files changed, 91
OMAP4 has two VOLTSETUP registers. One is controlling retention and
sleep voltage setup times, the other one off mode setup times. Both
of these need to be setup for stable behavior of the device.
The code setting up the new register will be added in the next
patch.
Signed-off-by: Tero Kristo t
changed to use the new structs.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c| 20 --
arch/arm/mach-omap2/vc.c | 35 ++---
arch/arm/mach-omap2/vc.h |7 +
arch/arm/mach
This contains startup and shutdown times for the oscillator. By default
use ULONG_MAX. Oscillator setup is used for calculating and setting up
latencies for sleep modes that disable oscillator.
Based on a patch from Nishanth Menon n...@ti.com.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch
We now use the previously defined oscillator setup / shutdown times
to calculate the register values for CLKSETUP.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/vc.c | 62 ++
1 files changed, 62 insertions(+), 0 deletions
... 1500mV
TWL6030 (SWCS045A) : 0V ... 2100mV
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c | 27 ++-
1 files changed, 10 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index dca1d66
Based on the oscillator datasheet for this device.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c
b/arch/arm/mach-omap2/board-omap3beagle.c
Beagleboard rev-c4 has a speed sorted OMAP3530 chip which can run at 720MHz.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/board-omap3beagle.c | 29 +
arch/arm/mach-omap2/opp3xxx_data.c |4
2 files changed, 33 insertions(+), 0
OMAP4 VC code now uses voltage deltas + slew rates for calculating
actual ramp times for voltage changes. Both retention / sleep +
off mode voltage ramp times are setup at the same time during
initialization.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/vc.c | 94
Now we select the vddmin and vddmax values based on both pmic and
voltage processor data, this allows usage of different power ICs.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/vp.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach
Voltage code will now enable / disable auto_ret / auto_off dynamically
according to the voltagedomain usecounts. This is accomplished via
the usage of the voltdm callback functions for sleep / wakeup.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/vc.c | 139
This is no longer needed as the ramp times are calculated from
voltage deltas + slew rates.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_twl.c |5 -
arch/arm/mach-omap2/voltage.h |1 -
2 files changed, 0 insertions(+), 6 deletions(-)
diff --git a/arch/arm
On Thu, 2012-05-31 at 18:40 -0500, Jon Hunter wrote:
Hi Tero,
On 05/31/2012 08:29 AM, Tero Kristo wrote:
Previously, PER clock domain was always enabled, as the usecounts
for this domain incorrectly always showed positive value. On HW
level though, the domain enters idle as it is set
On Fri, 2012-06-01 at 04:27 -0600, Paul Walmsley wrote:
On Fri, 1 Jun 2012, Menon, Nishanth wrote:
On Thu, May 31, 2012 at 8:28 AM, Tero Kristo t-kri...@ti.com wrote:
minor comment:
+void pwrdm_clkdm_enable(struct powerdomain *pwrdm)
snip
+void pwrdm_clkdm_disable(struct powerdomain
On Fri, 2012-06-08 at 17:55 +0530, Rajendra Nayak wrote:
On Friday 08 June 2012 04:26 PM, Tony Lindgren wrote:
* Rajendra Nayakrna...@ti.com [120608 03:40]:
Hi,
I don;t seem to be able to get suspend to work on 3.5-rc1 on
my 4430 panda. I am not sure if its UART wakeups that are
an
Hi Paul,
There's a bug in this patch, see below.
clip
{
@@ -1141,8 +1143,26 @@ static void _enable_sysc(struct omap_hwmod *oh)
sf = oh-class-sysc-sysc_flags;
if (sf SYSC_HAS_SIDLEMODE) {
- idlemode = (oh-flags HWMOD_SWSUP_SIDLE) ?
-
Hi Paul,
Tested this set on top of v3.5-rc1 with omap3 / omap4 suspend + my omap4
core retention / dev-off patches. There are a couple of minor issues,
like the bug in patch 5, and the fact that counter_32k hwmod data is
broken for omap4. This fix is needed on omap4 to fix the counter_32k, if
Hi,
Changes compared to previous version:
- moved basic omap4 pm errata support from dev-off set to this one
- changed ordering of patches a bit (core ret enabled at last patch)
- dropped DSP reset hack patch from set, as it is no longer needed
- added arch specific hwmod_ops support, needed for
Added similar PM errata flag support as omap3 has. This should be used
in similar manner, set the flags during init time, and check the flag
values during runtime.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm.h |7 +++
arch/arm/mach-omap2/pm44xx.c |1 +
2
already.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 86fc513..828e7b8 100644
--- a/arch
]
Signed-off-by: Paul Walmsley p...@pwsan.com
[t-kri...@ti.com: added support for arch specific hwmod ops, and changed
the no context offset indicator to USHRT_MAX]
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 70 --
arch
interrupts.
The BUG is applicable to only OMAP4460(r2pX) devices.
OMAP4470 (also r2pX) is not affected by this bug because
ROM code has been fixed.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/common.h
From: Rajendra Nayak rna...@ti.com
Remove the FIXME's in the suspend sequence since
we now intend to support system level RET support.
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
[Jean Pihet j-pi...@ti.com: ported on top of the functional power
states
.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/powerdomain44xx.c | 59 +
1 files changed, 59 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c
b/arch/arm/mach-omap2/powerdomain44xx.c
index 030d10c..ab93f08
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm44xx.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 1e845e8..eb3e073 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach
Hi,
V3 consists of following changes:
- ordering of patches changed (enable off-mode as last patch)
- rebased on top of 3.5-rc2
- rebased on top of Jean Pihet's functional power state code
- omap-secure driver has now its own CPU PM notifier:
* moved dummy wakeup dispatcher call from
explicitly.
Note: Eventually, these custom function implementation will be
abstracted and might be done in hwmod or in other layer.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/powerdomain44xx.c | 57
also adds a clear for the same register in the
omap4_pwrdm_clear_all_prev_pwrst function.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/powerdomain.c |4 +++
arch/arm/mach-omap2/powerdomain.h |4 +++
arch/arm/mach-omap2/powerdomain44xx.c | 39
(e.g. suspend) programs core pwrdm target as OFF, the functional
power state for the domain will be OSWR with the additional device off
enabled. Previous power state information will reflect this also.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/powerdomain.c
was written by:
Carlos Leija cile...@ti.com
Praneeth Bajjuri prane...@ti.com
Bryan Buckley bryan.buck...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/include/mach/omap-secure.h |1 +
arch/arm/mach-omap2/omap-secure.c | 36
-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap-secure.c | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-secure.c
b/arch/arm/mach-omap2/omap-secure.c
index 36ec5a5
the GIC save context is enough.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap-secure.c | 48 +++-
1 files changed, 46 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-secure.c
b/arch/arm/mach-omap2/omap-secure.c
index
As secure driver now has CPU PM notifier, move the security involved
tweaks from wakeupgen to here. This allows us to drop some runtime
omap chip type checks away also, as wakeupgen CPU PM notifier is no
longer needed at all on secure devices.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch
This patch adds device off support for MPUSS power domain. Device off
support is overloaded on top of core pwrdm functional OFF powerstate,
so the code must check the next core powerstate and set the save_state
status accordingly.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach
Menon n...@ti.com
Signed-off-by: Rajendra Nayak rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm44xx.h |5 +
arch/arm/mach-omap2/dpll44xx.c| 225 +
arch
santosh.shilim...@ti.com
[t-kri...@ti.com: added omap4 pm errata support]
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 52 +
arch/arm/mach-omap2/pm.h |1 +
arch/arm/mach-omap2/pm44xx.c | 11
rna...@ti.com
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
[t-kri...@ti.com: added omap4 pm errata support]
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 34 -
arch/arm/mach-omap2/pm.h |1
, the register configuration
is not set properly, we apply the required workaround allowing
the restore sequence to work properly.
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
[t-kri...@ti.com: moved workaround from omap-sar.c to pm44xx.c]
Signed-off-by: Tero Kristo t-kri...@ti.com
Haslam axelhas...@gmail.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm44xx.c | 328 +
arch/arm/mach-omap2/cm44xx.h |2 +
arch/arm/mach-omap2/omap-mpuss-lowpower.c |5 +-
3 files changed, 334 insertions(+), 1
Shilimkar santosh.shilim...@ti.com,
updated with the auto generate feature by Tero Kristo t-kri...@ti.com.
Contributions / cleanups to the original code were received from
Rajeev Kulkarni raj...@ti.com,
Nishanth Menon n...@ti.com,
Axel Haslam axelhas...@gmail.com and
Avinash.H.M avinas...@ti.com
System will now enter device off by default during suspend.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm44xx.c |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 341655e..8054afc
If AUX_CORE_BOOT0 does not indicate wakeup request for cpu1, put it back
to off. This is needed during wakeup from device off to prevent cpu1
from being stuck indefinitely in the wakeup loop and also to prevent
wakeup problem on GP chips with device off mode.
Signed-off-by: Tero Kristo t-kri
on OMAP4470.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap-wakeupgen.c | 22 ++
arch/arm/mach-omap2/omap4-sar-layout.h |1 +
arch/arm/mach-omap2/pm.h |1 +
3 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach
not prevent voltage scaling done by voltdm-scale / DVFS.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm44xx.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index
Haslam axelhas...@gmail.com
[t-kri...@ti.com: fixed commit message, merged multiple patches to one]
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/common.h |1 +
arch/arm/mach-omap2/omap-wakeupgen.c | 22 ++
arch/arm/mach-omap2/omap4-common.c
by Mykola Oleksiienko and Konstantin Shlyakhovoy.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm.h |1 +
arch/arm/mach-omap2/pm44xx.c | 12 +++-
2 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2
.
On Tue, Jun 12, 2012 at 5:31 PM, Tero Kristo t-kri...@ti.com wrote:
On OMAP4+, device wide off-mode has its own enable mechanism in addition
to powerdomain target states. This patch adds support for this on top
of functional power states by overloading the OFF state for core pwrdm.
On pwrdm
the pwrdm_ops struct).
Okay, I made an alternative implementation. Compared to this:
On Tue, Jun 12, 2012 at 5:31 PM, Tero Kristo t-kri...@ti.com wrote:
On OMAP4+, device wide off-mode has its own enable mechanism in addition
to powerdomain target states. This patch adds support for this on top
probably added by:
commit 49c008ecce1f9a549c12e8957668d60008ab0d79
Author: Tero Kristo t-kri...@ti.com
Date: Mon Feb 20 12:26:08 2012 +0200
arm: omap3: twl: add external controllers for core voltage regulators
Maybe you can put together a quick patch to fix these?
Yea, I can do
but not
used
This patch moves the code in question behind ARCH specific flags and
eliminates these warnings.
Reported-by: Paul Walmsley p...@pwsan.com
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/twl-common.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git
Hello,
Following set contains PRCM chain interrupt handling for OMAP3/4. Contents
of this set:
- Patch 1 was initially made by Thomas Petazzoni I believe, I made some
OMAP4 specific fixes on that one and updated this to conform to latest
kernel APIs. This patch contains the main logic for
separate
interrupts, and their handler is registered with IRQF_NO_SUSPEND,
otherwise the IRQ gets disabled during suspend, which prevents resume.
Patch tested on OMAP4 blaze board, no testing done on OMAP3.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Thomas Petazzoni thomas.petazz...@free
interrupt
will be triggered.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prcm.c | 53
arch/arm/plat-omap/include/plat/prcm.h |3 ++
2 files changed, 56 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b
This patch is just to test that the idea works generally, proper implementation
should be done for the OMAP UART driver.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm44xx.c |4
arch/arm/mach-omap2/serial.c |3 +++
drivers/tty/serial/omap-serial.c
On Tue, 2011-06-14 at 14:34 +0200, Govindraj wrote:
On Thu, Jun 9, 2011 at 6:55 PM, Tero Kristo t-kri...@ti.com wrote:
This patch is just to test that the idea works generally, proper
implementation
should be done for the OMAP UART driver.
Hi Govindraj,
Thanks for testing this out
not need any modifications. I don't know what is the
issue with OMAP3, and I can't debug it as I don't have OMAP3 HW yet. I
should receive one in hopefully a couple of weeks though.
-Tero
On Tue, 2011-06-14 at 14:34 +0200, Govindraj wrote:
On Thu, Jun 9, 2011 at 6:55 PM, Tero Kristo t-kri...@ti.com
On Thu, 2011-06-16 at 20:56 +0200, Hilman, Kevin wrote:
Hi Tero,
Tero Kristo t-kri...@ti.com writes:
Following set contains PRCM chain interrupt handling for OMAP3/4.
What does this series apply to? It doesn't seem to apply to mainline
(v3.0-rc3) or l-o master.
You are right
This set applies on top of PM branch.
Changes compared to previous set:
- should now apply cleanly
* removed pm44xx.c changes as the branch does not contain necessary support
Texas Instruments Oy, Tekniikantie 12, 02150 Espoo. Y-tunnus: 0115040-6.
Kotipaikka: Helsinki
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separate
interrupts, and their handler is registered with IRQF_NO_SUSPEND,
otherwise the IRQ gets disabled during suspend, which prevents resume.
TODO:
- add hooks to pm44xx.c
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Thomas Petazzoni thomas.petazz...@free-electrons.com
Cc: Avinash.H.M avinas
interrupt
will be triggered.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prcm.c | 53
arch/arm/plat-omap/include/plat/prcm.h |1 +
2 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/serial.c | 30 +++---
drivers/tty/serial/omap-serial.c |6 ++
2 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index
I was able to test this on OMAP3 beagleboard and got it working properly
after some sweating.
Version 3 changes:
- Changed omap3 PRCM wakeup interrupt handler to be a dummy, wakeup irq
clearing is now done when we are entering idle. This prevents PRCM
interrupt hanging in case UART is
This is required by OMAP3 as it needs to dynamically unmask events during
idle cycle.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prcm.c | 17 ++---
arch/arm/plat-omap/include/plat/prcm.h |1 +
2 files changed, 15 insertions(+), 3 deletions
interrupt
will be triggered.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prcm.c | 50
arch/arm/plat-omap/include/plat/prcm.h |1 +
2 files changed, 51 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/prcm.c b/arch
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 19 ---
arch/arm/mach-omap2/serial.c | 40 +---
2 files changed, 21 insertions(+), 38 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2
Any tty access should enable UART port first if it is idle.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
drivers/tty/serial/omap-serial.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index
to do this
during this time. Changing the wakeup handling logic also fixes an issue
with the chained PRCM serial interrupts, that prevents clearing of the
UART wakeup status and hangs the device.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 31
separate
interrupts, and their handler is registered with IRQF_NO_SUSPEND,
otherwise the IRQ gets disabled during suspend, which prevents resume.
Patch tested on OMAP4 blaze board, no testing done on OMAP3.
Signed-off-by: Tero Kristo t-kri...@ti.com
Cc: Thomas Petazzoni thomas.petazz...@free
() calls from omap_device.c.
-Tero
On Wed, 2011-06-22 at 18:42 +0200, Kristo, Tero wrote:
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/pm34xx.c | 19 ---
arch/arm/mach-omap2/serial.c | 40 +---
2 files changed, 21
On Thu, 2011-06-23 at 01:53 +0200, Hilman, Kevin wrote:
Hi Tero,
Tero Kristo t-kri...@ti.com writes:
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing
On Thu, 2011-06-23 at 10:19 +0200, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [110622 09:38]:
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM
On Thu, 2011-06-23 at 10:21 +0200, Tony Lindgren wrote:
* Tero Kristo t-kri...@ti.com [110622 09:38]:
@@ -550,6 +550,8 @@ static void omap_uart_idle_init(struct omap_uart_state
*uart)
ret = request_threaded_irq(uart-irq, NULL, omap_uart_interrupt
On Thu, 2012-02-23 at 15:34 +, Mark Brown wrote:
On Thu, Feb 23, 2012 at 01:05:09PM +0200, Tero Kristo wrote:
+static int twl6030coresmps_set_voltage(struct regulator_dev *rdev, int
min_uV,
+ int max_uV, unsigned *selector)
+{
+ struct twlreg_info *info = rdev_get_drvdata
On Wed, 2012-02-22 at 14:37 -0800, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
On Thu, 2012-02-16 at 09:31 -0800, Kevin Hilman wrote:
Tero Kristo t-kri...@ti.com writes:
On Thu, 2012-02-16 at 21:15 +0530, Shilimkar, Santosh wrote:
On Thu, Feb 16, 2012 at 8:53 PM, Tero
On Fri, 2012-02-24 at 11:49 +, Mark Brown wrote:
On Fri, Feb 24, 2012 at 11:38:09AM +0200, Tero Kristo wrote:
On Thu, 2012-02-23 at 15:34 +, Mark Brown wrote:
Since you're using min_uV as the register value you probably ought to
be returning that as the selector too
On Fri, 2012-02-24 at 13:24 +, Mark Brown wrote:
On Fri, Feb 24, 2012 at 03:16:38PM +0200, Tero Kristo wrote:
I still ain't quite sure how this would work, do you mean adding
something like this:
+static int twl6030smps_list_voltage(struct regulator_dev *rdev
On Fri, 2012-02-24 at 14:01 +, Mark Brown wrote:
On Fri, Feb 24, 2012 at 03:56:05PM +0200, Tero Kristo wrote:
So, do you want me to also change the num_voltages value for the
regulator from zero to be the same as max_uV, as we have this check
within regulator/core:
if (!ops
On Thu, 2012-02-23 at 19:23 +0530, Shilimkar, Santosh wrote:
On Thu, Feb 23, 2012 at 6:51 PM, Tero Kristo t-kri...@ti.com wrote:
From: Vishwanath BS vishwanath...@ti.com
IO Daisychain feature has to be triggered whenever there is a change in
device's mux configuration (See section 3.9.4
On Fri, 2012-02-24 at 14:34 +, Mark Brown wrote:
On Fri, Feb 24, 2012 at 04:25:12PM +0200, Tero Kristo wrote:
Still, setting selector in this case does nothing, as it is immediately
overwritten by the regulator core by -1. This looks like a perfectly
acceptable way to implement
On Fri, 2012-02-24 at 14:50 +, Mark Brown wrote:
On Fri, Feb 24, 2012 at 04:42:12PM +0200, Tero Kristo wrote:
On Fri, 2012-02-24 at 14:34 +, Mark Brown wrote:
Ah, so it is - we're fixing things up in the core. I'd forgotten we did
that.
So, no need to add list_voltage
Changes compared to previous version:
- patch2: changed timeout value to 100us (from 1000us)
- patch2: added timeout after the WUCLKIN disable
- some cosmetic tweaking to other patches
Tested on omap4430 blaze board with EMU chip, suspend / resume ok.
-Tero
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