On Mon, Aug 26, 2013 at 02:17:43PM +0200, Laurent Pinchart wrote:
On Friday 23 August 2013 09:57:43 Stephen Warren wrote:
On 08/22/2013 07:29 PM, Richard Zhao wrote:
On Fri, Aug 23, 2013 at 04:18:27AM +0800, Stephen Warren wrote:
On 08/21/2013 11:19 PM, Richard Zhao wrote:
On Fri, Aug
On Fri, Aug 23, 2013 at 09:57:43AM -0600, Stephen Warren wrote:
On 08/22/2013 07:29 PM, Richard Zhao wrote:
On Fri, Aug 23, 2013 at 04:18:27AM +0800, Stephen Warren wrote:
On 08/21/2013 11:19 PM, Richard Zhao wrote:
On Fri, Aug 02, 2013 at 10:00:00AM +0800, Richard Zhao wrote:
pass
DMA client device driver usually needs to know at probe time whether
dma controller has been registered to deffer probe. So add a help
function of_dma_check_controller.
DMA request channel functions can also used to check it, but they
are usually called at open() time.
Signed-off-by: Richard
On Fri, Aug 23, 2013 at 04:36:53AM +0800, Stephen Warren wrote:
On 08/22/2013 12:43 AM, Richard Zhao wrote:
DMA client device driver usually needs to know at probe time whether
dma controller has been registered to deffer probe. So add a help
function of_dma_check_controller.
DMA
On Fri, Aug 23, 2013 at 04:18:27AM +0800, Stephen Warren wrote:
On 08/21/2013 11:19 PM, Richard Zhao wrote:
On Fri, Aug 02, 2013 at 10:00:00AM +0800, Richard Zhao wrote:
pass of_phandle_args dma_spec to dma_request_channel in
of_dma_simple_xlate,
so the filter function could access
On Fri, Aug 02, 2013 at 10:00:00AM +0800, Richard Zhao wrote:
pass of_phandle_args dma_spec to dma_request_channel in of_dma_simple_xlate,
so the filter function could access of_node in of_phandle_args.
It also remove restriction of #dma-cells has to be one.
Signed-off-by: Richard Zhao riz
pass of_phandle_args dma_spec to dma_request_channel in of_dma_simple_xlate,
so the filter function could access of_node in of_phandle_args.
It also remove restriction of #dma-cells has to be one.
Signed-off-by: Richard Zhao riz...@nvidia.com
---
drivers/dma/edma.c | 7 +--
drivers/dma
If CONFIG_SMP, cpufreq skips loops_per_jiffy update, because different
arch has different per-cpu loops_per_jiffy definition.
Signed-off-by: Richard Zhao richard.z...@freescale.com
Acked-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/kernel/smp.c | 54
arm registered cpufreq transition notifier to recalculate it.
Signed-off-by: Richard Zhao richard.z...@freescale.com
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
---
drivers/cpufreq/omap-cpufreq.c | 35 ---
1 files changed, 0 insertions(+), 35 deletions
On Wed, Feb 29, 2012 at 10:21:19AM -0800, Kevin Hilman wrote:
Richard Zhao richard.z...@linaro.org writes:
The two patches were originally in [PATCH V6 0/7] add a generic cpufreq
driver.
I seperated them and hope they can go to upstream earlier.
Richard Zhao (2):
ARM: add cpufreq
If CONFIG_SMP, cpufreq skips loops_per_jiffy update, because different
arch has different per-cpu loops_per_jiffy definition.
Signed-off-by: Richard Zhao richard.z...@linaro.org
Acked-by: Russell King rmk+ker...@arm.linux.org.uk
---
arch/arm/kernel/smp.c | 54
arm registered cpufreq transition notifier to recalculate it.
Signed-off-by: Richard Zhao richard.z...@linaro.org
---
drivers/cpufreq/omap-cpufreq.c | 36
1 files changed, 0 insertions(+), 36 deletions(-)
diff --git a/drivers/cpufreq/omap-cpufreq.c b
The two patches were originally in [PATCH V6 0/7] add a generic cpufreq driver.
I seperated them and hope they can go to upstream earlier.
Richard Zhao (2):
ARM: add cpufreq transiton notifier to adjust loops_per_jiffy for smp
cpufreq: OMAP: remove loops_per_jiffy recalculate for smp
arch
On Fri, Dec 16, 2011 at 04:45:48PM -0800, Turquette, Mike wrote:
On Wed, Dec 14, 2011 at 5:18 AM, Thomas Gleixner t...@linutronix.de wrote:
On Tue, 13 Dec 2011, Mike Turquette wrote:
+void __clk_unprepare(struct clk *clk)
+{
+ if (!clk)
+ return;
+
+ if
On Wed, Dec 14, 2011 at 09:26:24PM +0800, Shawn Guo wrote:
Hi Dave,
Sorry for that I did not look into previous post to point it out.
On Wed, Dec 14, 2011 at 11:39:41AM +, Dave Martin wrote:
The i.MX6 Quad SoC will work without the l2x0 L2 cache controller
support built into the
On Wed, Dec 14, 2011 at 03:01:19PM +, Dave Martin wrote:
On Wed, Dec 14, 2011 at 10:05:04PM +0800, Richard Zhao wrote:
On Wed, Dec 14, 2011 at 09:26:24PM +0800, Shawn Guo wrote:
Hi Dave,
Sorry for that I did not look into previous post to point it out.
On Wed, Dec 14, 2011
On Thu, Dec 15, 2011 at 09:46:20AM +0800, Shawn Guo wrote:
On Thu, Dec 15, 2011 at 09:02:20AM +0800, Richard Zhao wrote:
On Wed, Dec 14, 2011 at 03:01:19PM +, Dave Martin wrote:
On Wed, Dec 14, 2011 at 10:05:04PM +0800, Richard Zhao wrote:
On Wed, Dec 14, 2011 at 09:26:24PM +0800
Hi Mike,
+ *
+ * @recalc_rate Recalculate the rate of this clock, by quering hardware
+ * and/or the clock's parent. It is up to the caller to insure
+ * that the prepare_mutex is held across this call. Returns the
+ * calculated rate. Optional, but
18 matches
Mail list logo
