On Wed, Oct 07, 2015 at 01:33:05PM -0400, Doug Ledford wrote:
> On 10/07/2015 01:01 PM, J. Bruce Fields wrote:
> > On Tue, Oct 06, 2015 at 01:44:25PM -0400, Doug Ledford wrote:
> >> On 09/28/2015 05:46 PM, Steve Wise wrote:
> >>> The server rdma_read_chunk_lcl() and rdma_read_chunk_frmr()
On 10/6/2015 9:49 PM, Bart Van Assche wrote:
On 10/06/2015 01:37 AM, Sagi Grimberg wrote:
I see now the error you are referring to.
The issue is that the device requires the MR page array to have
an alignment (0x40 for mlx4 and 0x400 for mlx5). When I modified the
page array allocation to be
There are several hits that WR buffer allocation(kmalloc) failed.
It failed at order 3 and/or 4 contigous pages allocation. At the same time
there are actually 100MB+ free memory but well fragmented.
So try vmalloc when kmalloc failed.
Signed-off-by: Wengang Wang
On 9/24/2015 1:49 PM, Wengang Wang wrote:
@@ -1050,8 +1057,9 @@ static void destroy_qp_common(struct mlx4_ib_dev *dev,
struct mlx4_ib_qp *qp,
>db);
ib_umem_release(qp->umem);
} else {
- kfree(qp->sq.wrid);
-
On 9/28/2015 5:08 AM, Wengang Wang wrote:
There is a mis-order in mlx4 log. Fix it.
Signed-off-by: Wengang Wang
I wanted to ack it, but wait...
We want commits to our driver to start with Capital letter so please
resubmit with this title
IB/mlx4: Use correct order
Hi Leon,
thanks for review.
在 2015年10月08日 12:33, Leon Romanovsky 写道:
On Mon, Sep 28, 2015 at 01:42:10PM +0800, Wengang Wang wrote:
The changing on tx_outstanding should be protected by spinlock or to be
atomic operations.
Such log is found in dmesg:
Sep 16 14:20:53 naep11x06 kernel: ib0:
Hi,
Any comment on this patch?
thanks,
wengang
在 2015年09月28日 13:42, Wengang Wang 写道:
The changing on tx_outstanding should be protected by spinlock or to be
atomic operations.
Such log is found in dmesg:
Sep 16 14:20:53 naep11x06 kernel: ib0: queue stopped 1, tx_head 1034733,
tx_tail
Hi,
Any comment on this patch?
thanks,
wengang
在 2015年09月28日 10:08, Wengang Wang 写道:
There is a mis-order in mlx4 log. Fix it.
Signed-off-by: Wengang Wang
---
drivers/net/ethernet/mellanox/mlx4/cmd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Thanks Or.
I will resend the revised(title) the patch with your Ack.
thanks,
wengang
在 2015年10月08日 12:52, Or Gerlitz 写道:
On 9/28/2015 5:08 AM, Wengang Wang wrote:
There is a mis-order in mlx4 log. Fix it.
Signed-off-by: Wengang Wang
I wanted to ack it, but wait...
On Mon, Sep 28, 2015 at 01:42:10PM +0800, Wengang Wang wrote:
> The changing on tx_outstanding should be protected by spinlock or to be
> atomic operations.
>
> Such log is found in dmesg:
>
> Sep 16 14:20:53 naep11x06 kernel: ib0: queue stopped 1, tx_head 1034733,
> tx_tail 1034733,
On 9/28/2015 5:08 AM, Wengang Wang wrote:
There is a mis-order in mlx4 log. Fix it.
Signed-off-by: Wengang Wang
Acked-by: Or Gerlitz
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There is a mis-order in mlx4 log. Fix it.
Signed-off-by: Wengang Wang
Acked-by: Or Gerlitz
---
drivers/net/ethernet/mellanox/mlx4/cmd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlx4/cmd.c
On Tue, Oct 06, 2015 at 11:37:40AM +0300, Sagi Grimberg wrote:
> The issue is that the device requires the MR page array to have
> an alignment (0x40 for mlx4 and 0x400 for mlx5). When I modified the
> page array allocation to be non-coherent I didn't take care of
> alignment.
Just curious: why
On Wed, Oct 07, 2015 at 12:25:25PM +0300, Sagi Grimberg wrote:
> Bart suggested that having to sync once for the entire page list might
> perform better than coherent memory. I'll settle either way since using
> non-coherent memory might cause higher-order allocations due to
> alignment, so it's
Casting a pointer to __be64 produces a warning on 32-bit architectures:
drivers/infiniband/hw/cxgb4/mem.c:147:20: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
req->wr.wr_lo = (__force __be64)_wait;
This was fixed at least twice for this driver in different
On Tue, Oct 6, 2015 at 6:00 PM, Chuck Lever wrote:
> Pass the correct backchannel transport class to svc_create_xprt()
> when setting up an NFSv4.1 backchannel transport.
>
> Signed-off-by: Chuck Lever
> ---
> fs/nfs/callback.c |
I don't really care either way, it just seemed like an odd change hiding
in here that I missed when reviewing earlier.
OK, so I'm sticking with it until someone suggests otherwise.
Sagi.
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On 10/7/2015 12:20 PM, Christoph Hellwig wrote:
On Tue, Oct 06, 2015 at 11:37:40AM +0300, Sagi Grimberg wrote:
The issue is that the device requires the MR page array to have
an alignment (0x40 for mlx4 and 0x400 for mlx5). When I modified the
page array allocation to be non-coherent I didn't
Hi,
Le mercredi 07 octobre 2015 à 16:19 +0300, Sagi Grimberg a écrit :
> On 10/7/2015 3:29 PM, Arnd Bergmann wrote:
> > The INIT_UDATA() macro requires a pointer or unsigned long argument
> > for
> > both input and output buffer, and all callers had a cast from when
> > the code was merged until
> On Oct 7, 2015, at 5:14 AM, Leon Romanovsky wrote:
>
> On Tue, Oct 6, 2015 at 6:00 PM, Chuck Lever wrote:
>> Pass the correct backchannel transport class to svc_create_xprt()
>> when setting up an NFSv4.1 backchannel transport.
>>
>> Signed-off-by:
On 10/7/2015 3:29 PM, Arnd Bergmann wrote:
The INIT_UDATA() macro requires a pointer or unsigned long argument for
both input and output buffer, and all callers had a cast from when
the code was merged until a recent restructuring, so now we get
core/uverbs_cmd.c: In function
The INIT_UDATA() macro requires a pointer or unsigned long argument for
both input and output buffer, and all callers had a cast from when
the code was merged until a recent restructuring, so now we get
core/uverbs_cmd.c: In function 'ib_uverbs_create_cq':
core/uverbs_cmd.c:1481:66: warning: cast
On Wednesday 07 October 2015 16:19:27 Sagi Grimberg wrote:
> On 10/7/2015 3:29 PM, Arnd Bergmann wrote:
> > The INIT_UDATA() macro requires a pointer or unsigned long argument for
> > both input and output buffer, and all callers had a cast from when
> > the code was merged until a recent
Hi,
Le mercredi 07 octobre 2015 à 14:29 +0200, Arnd Bergmann a écrit :
> The INIT_UDATA() macro requires a pointer or unsigned long argument
> for both input and output buffer, and all callers had a cast from
> when the code was merged until a recent restructuring, so now we get
>
>
On 10/6/2015 5:59 PM, Chuck Lever wrote:
The reply tasklet is fast, but it's single threaded. After reply
traffic saturates a single CPU, there's no more reply processing
capacity.
Replace the tasklet with a workqueue to spread reply handling across
all CPUs. This also moves RPC/RDMA reply
On 10/7/2015 5:48 PM, Chuck Lever wrote:
On Oct 7, 2015, at 10:39 AM, Sagi Grimberg wrote:
On 10/6/2015 5:59 PM, Chuck Lever wrote:
The reply tasklet is fast, but it's single threaded. After reply
traffic saturates a single CPU, there's no more reply processing
> On Oct 7, 2015, at 10:39 AM, Sagi Grimberg wrote:
>
> On 10/6/2015 5:59 PM, Chuck Lever wrote:
>> The reply tasklet is fast, but it's single threaded. After reply
>> traffic saturates a single CPU, there's no more reply processing
>> capacity.
>>
>> Replace the
On 10/07/2015 01:01 PM, J. Bruce Fields wrote:
> On Tue, Oct 06, 2015 at 01:44:25PM -0400, Doug Ledford wrote:
>> On 09/28/2015 05:46 PM, Steve Wise wrote:
>>> The server rdma_read_chunk_lcl() and rdma_read_chunk_frmr() functions
>>> were not taking into account the initial page_offset when
On 10/7/2015 6:46 PM, Bart Van Assche wrote:
On 10/06/2015 11:42 PM, Sagi Grimberg wrote:
On 10/6/2015 9:49 PM, Bart Van Assche wrote:
On 10/06/2015 01:37 AM, Sagi Grimberg wrote:
I see now the error you are referring to.
The issue is that the device requires the MR page array to have
an
This started popping up (not sure if it's new to 4.3-rc1).
Happens when unloading the provider driver (mlx4/mlx5 in my case).
Has anyone seen this?
kernel: [ cut here ]
kernel: WARNING: CPU: 2 PID: 6012 at drivers/infiniband/core/verbs.c:283
ib_dealloc_pd+0x5b/0xa0
On 10/07/2015 11:51 AM, Sagi Grimberg wrote:
> This started popping up (not sure if it's new to 4.3-rc1).
>
> Happens when unloading the provider driver (mlx4/mlx5 in my case).
>
> Has anyone seen this?
>
> kernel: [ cut here ]
> kernel: WARNING: CPU: 2 PID: 6012 at
Sagi,
On 10/7/15 8:51 AM, Sagi Grimberg wrote:
This started popping up (not sure if it's new to 4.3-rc1).
Happens when unloading the provider driver (mlx4/mlx5 in my case).
Has anyone seen this?
Not sure it is useful but yes I have seen similar dump with
RDS on 4.3-rc1. I later found that
On Wed, Oct 7, 2015 at 6:51 PM, Sagi Grimberg wrote:
> This started popping up (not sure if it's new to 4.3-rc1).
> Happens when unloading the provider driver (mlx4/mlx5 in my case).
> Has anyone seen this?
yes, I think to see it over the last 1-2 years
Or.
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To
On 10/07/2015 02:20 AM, Christoph Hellwig wrote:
On Tue, Oct 06, 2015 at 11:37:40AM +0300, Sagi Grimberg wrote:
The issue is that the device requires the MR page array to have
an alignment (0x40 for mlx4 and 0x400 for mlx5). When I modified the
page array allocation to be non-coherent I didn't
On Tue, Oct 06, 2015 at 01:44:25PM -0400, Doug Ledford wrote:
> On 09/28/2015 05:46 PM, Steve Wise wrote:
> > The server rdma_read_chunk_lcl() and rdma_read_chunk_frmr() functions
> > were not taking into account the initial page_offset when determining
> > the rdma read length. This resulted in
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