From: Santosh Shilimkar
> Sent: 30 September 2015 18:24
...
> This is being addressed by simply using per bucket rw lock which makes the
> locking simple and very efficient. The hash table size is still an issue and
> I plan to address it by using re-sizable hash tables as suggested on the list.
From: Julia Lawall
On Wed, 4 Jun 2014, Geert Uytterhoeven wrote:
Hi Julia,
On Wed, Jun 4, 2014 at 11:07 AM, Julia Lawall julia.law...@lip6.fr wrote:
Find_first_zero_bit considers BITS_PER_LONG bits at a time, and thus may
return a larger number than the maximum position argument if
From: Julia Lawall
On Wed, 4 Jun 2014, Geert Uytterhoeven wrote:
Hi Julia,
On Wed, Jun 4, 2014 at 1:00 PM, Julia Lawall julia.law...@lip6.fr wrote:
OK, thanks. I was only looking at the C code.
But the C code contains a loop that is followed by:
if (!size)
From: Yann Droneaud
Hi,
Le vendredi 28 mars 2014 11:24 +0300, Dan Carpenter a crit :
The c4iw_alloc_ucontext_resp struct has a 4 byte hole after the last
member and we should clear it before passing it to the user.
Fixes: 05eb23893c2c ('cxgb4/iw_cxgb4: Doorbell Drop Avoidance Bug
It seems to me that a more useful interface would take a minimum and
maximum number of vectors from the driver. This wouldn't allow the
driver to specify that it could only accept, say, any even number within
a certain range, but you could still leave the current functions
available for
Subject: Re: [PATCH 0/2] fs: supply inode uid/gid setting interface
On 2013/8/23 12:10, Greg KH wrote:
On Fri, Aug 23, 2013 at 10:48:36AM +0800, Rui Xiang wrote:
This patchset implements an accessor functions to set uid/gid
in inode struct. Just finish code clean up.
Why?
It can
This patch implements a low latency Write Combining (aka Write Coalescing)
work
request path. PCIE maps User Space Doorbell BAR2 region writes to the new
interface to SGE. SGE pulls a new message from PCIE new interface and if its a
coalesced write work request then pushes it for processing.
+ writel(n, adap-bar2 + q-udb + 8);
+#if defined(CONFIG_X86_32) || defined(CONFIG_X86_64)
+ asm volatile(sfence : : : memory);
+#endif
There is absolutely no way I'm letting anyone put crap like this
into a driver.
Use a portable inteface,
struct {
u64 fielda
u32 field;
};
In this case: On 64 bit: the u64 is aligned to 8 and the u32
is aligned to 4. So
the structure is aligned to 8. A pad is inserted at the end of the
struct to bring it out. On 32 bit, the u64 is aligned to 4, so the
struct is aligned to
- Header file for userspace library and kernel driver interface.
+struct ocrdma_alloc_ucontext_resp {
+ u32 dev_id;
+ u32 wqe_size;
+ u32 max_inline_data;
+ u32 dpp_wqe_size;
+ u64 ah_tbl_page;
+ u32 ah_tbl_len;
+ u32 rsvd;
+
+#define is_cqe_wr_imm(cqe) \
+ ((le32_to_cpu(cqe-flags_status_srcqpn) OCRDMA_CQE_WRITE_IMM) ? 1
: 0)
...similar comment about using readable typesafe inline functions
instead of macros...
and if you are using #defines, you need to enclose every reference
to the parameters in
11 matches
Mail list logo