Re: [PATCH RFC v2 08/10] IB/mlx5: Support IB_WR_REG_SIG_MR

2013-11-03 Thread Sagi Grimberg
On 11/1/2013 5:05 PM, Bart Van Assche wrote: On 31/10/2013 5:24, Sagi Grimberg wrote: +static u8 bs_selector(int block_size) +{ +switch (block_size) { +case 512:return 0x1; +case 520:return 0x2; +case 4096:return 0x3; +case 4160:return 0x4; +

Re: [PATCH RFC v2 08/10] IB/mlx5: Support IB_WR_REG_SIG_MR

2013-11-03 Thread Sagi Grimberg
On 11/2/2013 11:59 PM, Bart Van Assche wrote: On 2/11/2013 12:21, Or Gerlitz wrote: On Fri, Nov 1, 2013 at 10:37 PM, Bart Van Assche bvanass...@acm.org wrote: On 31/10/2013 5:24, Sagi Grimberg wrote: This patch implements IB_WR_REG_SIG_MR posted by the user. Baisically this WR involvs 3

Re: [PATCH RFC v2 08/10] IB/mlx5: Support IB_WR_REG_SIG_MR

2013-11-02 Thread Or Gerlitz
On Fri, Nov 1, 2013 at 10:37 PM, Bart Van Assche bvanass...@acm.org wrote: On 31/10/2013 5:24, Sagi Grimberg wrote: This patch implements IB_WR_REG_SIG_MR posted by the user. Baisically this WR involvs 3 WQEs in order to prepare and properly register the signature layout: 1. post UMR WR to

Re: [PATCH RFC v2 08/10] IB/mlx5: Support IB_WR_REG_SIG_MR

2013-11-02 Thread Bart Van Assche
On 2/11/2013 12:21, Or Gerlitz wrote: On Fri, Nov 1, 2013 at 10:37 PM, Bart Van Assche bvanass...@acm.org wrote: On 31/10/2013 5:24, Sagi Grimberg wrote: This patch implements IB_WR_REG_SIG_MR posted by the user. Baisically this WR involvs 3 WQEs in order to prepare and properly register the

Re: [PATCH RFC v2 08/10] IB/mlx5: Support IB_WR_REG_SIG_MR

2013-11-01 Thread Bart Van Assche
On 31/10/2013 5:24, Sagi Grimberg wrote: +static u8 bs_selector(int block_size) +{ + switch (block_size) { + case 512: return 0x1; + case 520: return 0x2; + case 4096: return 0x3; + case 4160: return 0x4; + case

Re: [PATCH RFC v2 08/10] IB/mlx5: Support IB_WR_REG_SIG_MR

2013-11-01 Thread Bart Van Assche
On 31/10/2013 5:24, Sagi Grimberg wrote: This patch implements IB_WR_REG_SIG_MR posted by the user. Baisically this WR involvs 3 WQEs in order to prepare and properly register the signature layout: 1. post UMR WR to register the sig_mr in one of two possible ways: * In case the user

[PATCH RFC v2 08/10] IB/mlx5: Support IB_WR_REG_SIG_MR

2013-10-31 Thread Sagi Grimberg
This patch implements IB_WR_REG_SIG_MR posted by the user. Baisically this WR involvs 3 WQEs in order to prepare and properly register the signature layout: 1. post UMR WR to register the sig_mr in one of two possible ways: * In case the user registered a single MR for data so the UMR data

Re: [PATCH RFC v2 08/10] IB/mlx5: Support IB_WR_REG_SIG_MR

2013-10-31 Thread Jack Wang
On 10/31/2013 01:24 PM, Sagi Grimberg wrote: +{ + struct ib_mr *sig_mr = wr-wr.sig_handover.sig_mr; + u32 sig_key = sig_mr-rkey; + + memset(seg, 0, sizeof(*seg)); + + seg-status = 0x4; /*set free*/ + seg-flags = get_umr_flags(wr-wr.sig_handover.access_flags) | +