On 25 January 2016 at 20:18, Wolfram Sang wrote:
> From: Wolfram Sang
>
> IMO this info is only useful for developers. Most users won't need this
> information, since there is not much they can do about it.
>
> Signed-off-by: Wolfram Sang
On 25 January 2016 at 20:15, Wolfram Sang wrote:
> From: Wolfram Sang
>
> Registers are 64bit apart, so we refactor bus_shift handling a little
> and set it based on the DT compatible. Also, EXT_ACC is different.
>
> Signed-off-by: Ai Kyuse
On 25 January 2016 at 20:15, Wolfram Sang wrote:
> So, here is the series to enable basic SD support on r8a7795; no DMA and UHS-I
> for now. Will be added incrementally. It turns out that the driver needs a
> little love, so some refactoring is also in place before adding the
Signed-off-by: Geert Uytterhoeven
---
v4:
- Change one-line summary prefix to match current arm-soc practices,
v3:
- New.
---
arch/arm/boot/dts/r8a7790.dtsi | 30 --
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git
Signed-off-by: Geert Uytterhoeven
---
v4:
- Change one-line summary prefix to match current arm-soc practices,
v3:
- New.
---
arch/arm/boot/dts/r8a7791.dtsi | 54 --
1 file changed, 36 insertions(+), 18 deletions(-)
diff
From: Laurent Pinchart
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart
Acked-by: Simon Horman
Signed-off-by:
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Geert Uytterhoeven
Acked-by: Laurent Pinchart
---
v4:
- Change one-line summary prefix to match current arm-soc practices,
v3:
-
From: Laurent Pinchart
The clock is really the device functional clock, not the interface
clock. Rename it.
Signed-off-by: Laurent Pinchart
Acked-by: Simon Horman
Signed-off-by:
Acked-by,
- Update for "[PATCH 0/2] ARM: shmobile: r8a7793: Increase scif
support".
Dependencies:
- This series was created on top of "[PATCH v4 0/7] ARM: dts: R-Car:
Add SCIF fallback compatibility strings", but I think it applies to
plain renesas-devel-20
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven
---
Untested, based on
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven
---
Based on schematics,
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates:
- SCIF:
- Supports now 50, 230400, 460800, 50, and 921600 bps,
-
change that clock, you'll get garbage again.
Dependencies:
- renesas-devel-20160129-v4.5-rc1,
- series "[PATCH v4 0/7] ARM: dts: R-Car: Add SCIF fallback
compatibility strings",
- series "[PATCH v4 00/11] ARM: dts: shmobile: Rename the serial port
clock to fck",
- series &
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven
---
Untested, based on
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven
---
Based on schematics,
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (S1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depends on
the actual board.
Add the two optional clock sources (S1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF
Add the device node for the external SCIF_CLK.
The presence of the SCIF_CLK crystal and its clock frequency depend on
the actual board.
Add the two optional clock sources (S3D1 and SCIF_CLK for the internal
resp. external clock) for the Baud Rate Generator for External Clock
(BRG) to all SCIF and
From: Wolfram Sang
The bus width is sometimes the actual bus width, and sometimes indices
to different arrays encoding the bus width. In my debugging case "2"
could mean 8-bit as well as 4-bit, which was extremly confusing. Let's
use the human-readable actual
Hi Simon,
On Fri, Jan 29, 2016 at 1:34 AM, Simon Horman wrote:
> Your grep shows up some matches in arch/arm64/boot/dts/renesas/.
That's correct.
> For some reason that was not on my mental todo list. Should I add it?
IIRC, I reported those a while ago, and you said you
On Wed, Jan 21, 2015 at 2:38 PM, Lars-Peter Clausen wrote:
> According to the sh7724 hardware user manual (Rev.2.00 Jan 2013) page 1851
> to 1856 the FSI bit-clock is inverted to the bit-clock as specified by the
> I2S standard. This means the bit clock inversion bit should be
This patch adds SD[0..3] clock divider support for R-Car Gen3 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Dirk Behme
---
Changes in v2: Incorporate review comments and merge with
"clk: shmobile: r8a7795: Add SDHI
Hello.
On 01/28/2016 08:49 AM, Yoshihiro Shimoda wrote:
From: linux-renesas-soc-ow...@vger.kernel.org
[mailto:linux-renesas-soc-ow...@vger.kernel.org] On Behalf Of Sergei
Shtylyov
Sent: Wednesday, January 27, 2016 7:14 AM
Now that Maxim Integrated MAX3355 'extcon' driver and device tree
On 01/29/2016 11:28 PM, Sergei Shtylyov wrote:
From: linux-renesas-soc-ow...@vger.kernel.org
[mailto:linux-renesas-soc-ow...@vger.kernel.org] On Behalf Of Sergei
Shtylyov
Sent: Wednesday, January 27, 2016 7:14 AM
Now that Maxim Integrated MAX3355 'extcon' driver and device tree bindings
are
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