Hi Rob,
> On Thu, Apr 28, 2016 at 01:23:07PM +0100, Ramesh Shanmugasundaram wrote:
> > This patch adds support for the CAN FD controller found in Renesas
> > R-Car SoCs. The controller operates in CAN FD only mode by default.
> >
> > CAN FD mode supports both Classical CAN & CAN FD frame formats.
On Fri, Apr 29, 2016 at 02:58:25PM +0200, Geert Uytterhoeven wrote:
> Some Renesas SCIF UARTs have dedicated lines for RTS/CTS hardware flow
> control. Whether these lines exist depends on SoC and UART instance
> inside the SoC. Whether these lines can be used for hardware flow
> control depends
Hi Simon,
On 29.04.2016 12:35, Marc Zyngier wrote:
On Fri, 29 Apr 2016 09:43:45 +1000
Simon Horman wrote:
[Cc Mark Zyngier, linux-arm-kernel]
Hi Dirk,
On Thu, Apr 28, 2016 at 07:41:57AM +0200, Dirk Behme wrote:
Hi Simon,
On 28.04.2016 01:30, Simon Horman wrote:
Hi Dirk,
I understand tha
On 21.04.2016 15:00, Geert Uytterhoeven wrote:
On Thu, Apr 21, 2016 at 12:24 PM, Dirk Behme wrote:
In case thermal_zone_xxx_register() returns an error, priv->zone
isn't NULL any more, but contains the error code.
This is passed to thermal_zone_device_unregister(), then. This checks
for priv->
On Thu, Apr 28, 2016 at 01:23:07PM +0100, Ramesh Shanmugasundaram wrote:
> This patch adds support for the CAN FD controller found in Renesas R-Car
> SoCs. The controller operates in CAN FD only mode by default.
>
> CAN FD mode supports both Classical CAN & CAN FD frame formats. The
> controller s
From: Yoshihiro Kaneko
Date: Mon, 2 May 2016 00:19:51 +0900
> From: Kazuya Mizuguchi
>
> Aligning the reception data size is not required.
>
> Signed-off-by: Kazuya Mizuguchi
> Signed-off-by: Yoshihiro Kaneko
> Tested-by: Simon Horman
Applied, thanks.
On Tue, May 3, 2016 at 2:40 PM, Ulrich Hecht
wrote:
> Same as on r8a7791.
>
> Signed-off-by: Ulrich Hecht
> ---
> --- a/arch/arm/boot/dts/r8a7793.dtsi
> +++ b/arch/arm/boot/dts/r8a7793.dtsi
> @@ -543,6 +543,19 @@
> status = "disabled";
> };
>
> + mmcif0: mmcif@ee200
Same as on r8a7791.
Signed-off-by: Ulrich Hecht
---
This revision updates the power-domains node.
CU
Uli
Changes since v3:
- set power-domains = <&sysc R8A7793_PD_ALWAYS_ON>
Changes since v2:
- change back to one DMA controller
- use GIC_SPI
- add max-frequency
arch/arm/boot/dts/r8a7793.dt
On 2 May 2016 at 22:25, Wolfram Sang wrote:
> Here is a small refactoring series for setting the clock for SDHI cores. This
> is to prevent regression on platforms where this feature has not been tested.
> One such regression is known on r8a7740 (patches 2+3). Patch 4 fixes an
> oversight and patc
Hi Wolfram,
On Mon, May 2, 2016 at 10:25 PM, Wolfram Sang wrote:
> Here is a small refactoring series for setting the clock for SDHI cores. This
> is to prevent regression on platforms where this feature has not been tested.
> One such regression is known on r8a7740 (patches 2+3). Patch 4 fixes a
10 matches
Mail list logo